參數(shù)資料
型號： MX7705EWE+T
廠商： Maxim Integrated Products
文件頁數(shù)： 16/33頁
文件大?。?/td> 0K
描述： IC ADC 16BIT 2CH 16-SOIC
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 1,000
位數(shù)： 16
采樣率（每秒）： 500
數(shù)據(jù)接口： MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC W
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 2 個差分，單極
ZERO: (Default = 0) Zero Bit. This is a read-only bit.
Values written to this bit are ignored.
CLKDIS: (Default = 0) Clock-Disable Bit. Set CLKDIS =
1 to disable the clock when using a crystal or resonator
across CLKIN and CLKOUT. Set CLKDIS = 1 to disable
CLKOUT when using a CMOS clock source at CLKIN.
CLKOUT is held low during clock disable to save
power. Set CLKDIS = 0 to allow other devices to use
the output signal on CLKOUT as a clock source and/or
to enable the external oscillator.
CLKDIV: (Default = 0) Clock-Divider Control Bit. The
MX7705 has an internal clock divider. Set this bit to 1 to
divide the input clock by two. When this bit is set to 0, the
MX7705 operates at the external oscillator frequency.
CLK: (Default = 1) Clock Bit. Set CLK = 1 for fCLKIN =
2.4576MHz with CLKDIV = 0, or 4.9152MHz with
CLKDIV = 1.
MX7705
16-Bit, Low-Power, 2-Channel,
Sigma-Delta ADC
______________________________________________________________________________________
23
Table 6. Communications Register
FIRST BIT (MSB)
(LSB)
FUNCTION
COMMUNICATION
START/DATA READY
REGISTER SELECT
READ/WRITE
SELECT
POWER-DOWN
MODE
CHANNEL SELECT
Name
0/
DRDY
RS2
RS1
RS0
R/
W
PD
CH1
CH0
Defaults
0
Table 7. Register Selection
RS2
RS1
RS0
REGISTER
POWER-ON RESET STATUS
REGISTER SIZE (BITS)
0
Communications Register
0x00
8
0
1
Setup Register
0x01
8
0
1
0
Clock Register
0x05
8
0
1
Data Register
N/A
16
1
0
Test Register*
N/A
8
1
0
1
No Operation
—
1
0
Offset Register
0x1F 40 00
24
1
Gain Register
0x57 61 AB
24
Table 8. Channel Selection
CH1
CH0
AIN+
AIN-
OFFSET/GAIN
REGISTER PAIR
0
AIN1+
AIN1-
0
1
AIN2+
AIN2-
1
0
AIN1-
0
1
AIN1-
AIN2-
2
*
The test register is used for factory testing only.
Table 9. Setup Register
FIRST BIT (MSB)
(LSB)
FUNCTION
MODE CONTROL
PGA GAIN CONTROL
BIPOLAR/UNIPOLAR
MODE
BUFFER ENABLE
FSYNC
Name
MD1
MD0
G2
G1
G0
B/U
BUF
FSYNC
Defaults
0
1
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參數(shù)描述
MX7820 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS.1.3µ.s.8-Bit ADC with Voltage Reference and Track/Hold
MX7820BQ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MX7820CQ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MX7820KCWP 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MX7820KCWP+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
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