參數(shù)資料
型號(hào): MX7705EWE+T
廠商: Maxim Integrated Products
文件頁數(shù): 14/33頁
文件大?。?/td> 0K
描述: IC ADC 16BIT 2CH 16-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 16
采樣率(每秒): 500
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)差分,單極
External Oscillator
The oscillator requires time to stabilize when enabled.
Startup time for the oscillator depends on supply voltage,
temperature, load capacitances, and center frequency.
Depending on the load capacitance, a 1M
Ω feedback
resistor across the crystal can reduce the startup time
(Figure 7). The MX7705 was tested with an ECS-24-32-1
(2.4576MHz crystal) and an ECS-49-20-1 (4.9152MHz
crystal) (see the
Typical Operating Characteristics). In
power-down mode, the supply current with the external
oscillator enabled is typically 67A with a 3V supply and
227A with a 5V supply.
Serial-Digital Interface
The MX7705 interface is fully compatible with SPI-, QSPI-,
and MICROWIRE-standard serial interfaces. The serial
interface provides access to seven on-chip registers. The
registers are 8, 16, and 24 bits in size.
Drive CS low to transfer data in and out of the MX7705.
Clock in data at DIN on the rising edge of SCLK. Data at
DOUT changes on the falling edge of SCLK and is valid
on the rising edge of SCLK. DIN and DOUT are trans-
ferred MSB first. Drive CS high to force DOUT high
impedance and cause the MX7705 to ignore any signals
on SCLK and DIN. Connect CS low for 3-wire operation.
Figures 8 and 9 show the timings for write and read
operations, respectively.
On-Chip Registers
The MX7705 contains seven internal registers (Figure 10),
which are accessed by the serial interface. These regis-
ters control the various functions of the device and allow
the results to be read. Table 7 lists the address, power-on
default value, and size of each register.
The first of these registers is the communications register.
The 8-bit communications register controls the acquisition
channel selection, whether the next data transfer is a read
or write operation, and which register is to be accessed.
The second register is the 8-bit setup register, which con-
trols calibration modes, gain setting, unipolar/bipolar
inputs, and buffered/unbuffered modes. The third register
is the 8-bit clock register, which sets the digital filter char-
acteristics and the clock control bits. The fourth register is
the 16-bit data register, which holds the output result. The
24-bit offset and gain registers store the calibration coeffi-
cients for the MX7705. The 8-bit test register is used for
factory testing only.
The default state of the MX7705 is to wait for a write to
the communications register. Any write or read opera-
tion on the MX7705 is a two-step process. First, a com-
mand byte is written to the communications register.
This command selects the input channel, the desired
register for the next read or write operation, and
whether the next operation is a read or a write. The sec-
ond step is to read from or write to the selected regis-
ter. At the end of the data-transfer cycle, the device
returns to the default state. See the
Performing a
Conversion section for examples.
If the serial communication is lost, write 32 ones to the
serial interface to return the MX7705 to the default
state. The registers are not reset after this operation.
MX7705
16-Bit, Low-Power, 2-Channel,
Sigma-Delta ADC
______________________________________________________________________________________
21
CRYSTAL OR
CERAMIC
RESONATOR
CL
CLKIN
CLKOUT
OPTIONAL
1M
Ω
MX7705
Figure 7. Using a Crystal or Ceramic Oscillator
CS
t2
t6
t9
t10
SCLK
MSB
LSB
DIN
Figure 8. Write Timing Diagram
t2
t4
t5
t3
t8
t6
t7
t1
SCLK
MSB
LSB
DOUT
CS
DRDY
Figure 9. Read Timing Diagram
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