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參數(shù)資料
| 型號： | MX26L12811MC |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 128M [x8/x16] SINGLE 3V PAGE MODE MTP MEMORY |
| 中文描述： | 128M的[x8/x16]單3V頁面模式中期記憶 |
| 文件頁數(shù)： | 1/32頁 |
| 文件大?。?/td> | 265K |
| 代理商： | MX26L12811MC |
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P/N:PM0990
REV. 1.0, OCT. 29, 2003
MX26L12811MC
128M [x8/x16] SINGLE 3V PAGE MODE MTP MEMORY
FEATURES
3.0V to 3.6V operation voltage
Block Structure
- 128 x 128Kbyte Erase Blocks
Fast random / page mode access time
- 120/25 ns Read Access Time (page depth:4-word)
32-Byte Write Buffer
- 6 us/byte Effective Programming Time
Performance
Low power dissipation
- typical 15mA active current for page mode read
- 80uA/(max.) standby current
High Performance
- Block erase time: 2s typ.
- Byte programming time: 210us typ.
- Block programming time: 0.8s typ. (using Write to
Buffer Command)
Program/Erase Endurance cycles: 10 cycles
Packaging
- 44-Lead SOP
Technology
- Nbit (0.25u) MTP Technology
GENERAL DESCRIPTION
The MXIC's MX26L12811MC series MTP use the most
advance 2 bits/cell Nbit technology, double the storage
capacity of memory cell. The device provide the high
density MTP memory solution with reliable performance
and most cost-effective.
The device organized as by 8 bits or by 16 bits of output
bus. The device is packaged in 44-Lead SOP. It is de-
signed to be reprogrammed and erased in system or in
standard EPROM programmers.
The device offers fast access time and allowing opera-
tion of high-speed microprocessors without wait states.
The device augment EPROM functionality with in-circuit
electrical erasure and programming. The device uses a
command register to manage this functionality.
The MXIC's Nbit technology reliably stores memory con-
tents even after the specific erase and program cycles.
The MXIC cell is designed to optimize the erase and
program mechanisms by utilizing the dielectric's charac-
ter to trap or release charges from ONO layer.
The device uses a 3.0V to 3.6V VCC supply to perform
the High Reliability Erase and auto Program/Erase algo-
rithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
相關(guān)PDF資料 |
PDF描述 |
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| MX26L12811MC-12 | 128M [x8/x16] SINGLE 3V PAGE MODE MTP MEMORY |
| MX28F128J3 | 128M [x8/x16] SINGLE 3V PAGE MODE FLASH MEMORY |
| MX29F1611 | 16M-BIT [2M x 8/1M x 16] CMOS SINGLE VOLTAGE PAGEMODE FLASH EEPROM |
| MX29LV017AXEC-90 | 16M-BIT [2Mx8] CMOS SINGLE VOLTAGE |
| MX29LV017ATI-70 | 16M-BIT [2Mx8] CMOS SINGLE VOLTAGE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MX26L12811MC-12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128M [x8/x16] SINGLE 3V PAGE MODE MTP MEMORY |
| MX26L1620 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [1M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM |
| MX26L1620MC-12 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [1M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM |
| MX26L1620MC-90 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [1M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM |
| MX26L1620MI-12 | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:16M-BIT [1M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM |
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