參數資料
型號: MVTX2604AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網絡接口
英文描述: Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA553
封裝: 37.50 X 37.50 MM, 2.33 MM HEIGHT, MS-034, HSBGA-553
文件頁數: 29/173頁
文件大小: 2097K
代理商: MVTX2604AG
MVTX2604
Data Sheet
31
Zarlink Semiconductor Inc.
5.8 Memory Configurations
The MVTX2604 supports the following memory configurations. Pipeline SBRAM modes support 1 M and 2 M per
bank configurations, while ZBT mode supports 4 M configurations, 2 M per domain (bank). For detail connection
information, please reference the memory application note.
Table 4 - Supported Memory Configurations (SBRAM Mode)
Table 5 - Supported Memory Configurations (ZBT Mode)
Table 6 - Options for Memory Configuration
Configuration
1 M per bank
(Bootstrap pin
TSTOUT7 = open)
2 M per bank
(Bootstrap pin
TSTOUT7 = pull down)
Connections
Single Layer
(Bootstrap pin
TSTOUT13 = open)
Two 128 K x 32 SRAM/bank
or
One 128 K x 64 SRAM/ban
k
Two 256 K x 32 SRAM/bank
Connect 0E# and WE#
Double Layer
(Bootstrap pin
TSTOUT13 = pull
down)
NA
Four 128 K x 32
SRAM/bank
or
Two 128 K x 64 SRAM/bank
Connect 0E0# and
WE0#
Connect 0E1# and
WE1#
Configuration
2 M per bank
Connections
Single Layer
(Bootstrap pin
TSTOUT13 = open)
Two 256 K x 32 ZBT SRAM/bank
or One 256 K x 64 ZBT SRAM/bank
Connect ADS# to Layer 0 chipselect
pin
Double Layer
(Bootstrap pin
TSTOUT13 = pull down)
Four 128 K x 32 ZBT SRAM/bank
or Two 128 K x 64 ZBT SRAM/bank
Connect ADS# to Layer 0 chipselect
pin
and 0E# to Layer 1 chipselect pin
Frame data Buffer
Only Bank A
Bank A and Bank B
Bank A and Bank B
1 M
(SBRAM)
2 M
(SBRAM)
1 M/bank
(SBRAM)
2 M/bank
(SBRAM)
1 M/bank
(ZBT SRAM)
2 M/bank
(ZBT SRAM)
MVTX2601
X
X
MVTX2602
X
X
MVTX2603
X
X
MVTX2603
(Gigabit ports
in 2giga mode)
X
X
MVTX2604
X
X
MVTX2604
(Gigabit ports
in 2giga mode)
X
X
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