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| 型號： | MUNICH128X |
| 廠商： | SIEMENS A G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 8.192M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160 |
| 封裝： | METRIC, PLASTIC, QFP-160 |
| 文件頁數(shù)： | 38/39頁 |
| 文件大小： | 227K |
| 代理商： | MUNICH128X |
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MUNICH128X
Operational Overview
Semiconductor Group
8
1997-12-01
2
Operational Overview
The MUNICH128X is a “channelized” WAN protocol controller that performs protocol
processing on up to 128 full duplex serial PCM channels. It performs HDLC-based layer
2 protocol formatting and deformatting, as well as rate adaptation, for each of the
128 channels independently.
The MUNICH128X provides dedicated registers for each of the four HDLC controllers,
with each set similar to the “core” registers of the MUNICH32X. Software developed for
the “core” of the MUNICH32X requires minimal modification to run optimally on the
MUNICH128X. The architecture of the register sets allows any number of HDLC
controllers within an MUNICH128X device to operate with host software images that
differ only in their offset from the PCI base address and their pointers into host memory.
Host software sets the operating mode, rate adaptation method and time slot
assignment of each channel by configuring “blocks” (CCBs) within host memory.
During “run-time” the MUNICH128X performs all data and descriptor transfers as a bus
master. Additionally, host software may access any register of a particular HDLC
Controller within the MUNICH128X, with the device acting as a bus slave.
The MUNICH128X provides a single Status Register, which maintains information of all
interrupt events for the controller.
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