- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄359236 > MU9C1480A-90DC Content Addressable Memory PDF資料下載
參數(shù)資料
| 型號(hào)： | MU9C1480A-90DC |
| 英文描述： | Content Addressable Memory |
| 中文描述： | 內(nèi)容可尋址存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 21/28頁(yè) |
| 文件大?。?/td> | 246K |
| 代理商： | MU9C1480A-90DC |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)當(dāng)前第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)
MU9C1480A/L Draft
Rev. 3.0 Draft
21
Table 8: Control Register Bit Assignments
Note:
D15 reads back as 0.
15
14 13
12 11
10 9
8 7 6
5 4
3 2
1 0
RST
R
E
S
E
T
=
0
Match Flag
Enable
=00
Disable
= 01
No Change
= 11
Full Flag
Enable
= 00
Disable
= 01
No Change
= 11
Translation
Input Not
Translated
= 00
Input
Translated
= 01
No Change
= 11
CAM/RAM Part.
64 CAM/0 RAM = 000
48 CAM/16 RAM = 001
32 CAM/32 RAM = 010
16 CAM/48 RAM = 011
48 RAM/16 CAM = 100
32 RAM/32 CAM = 101
16 RAM/48 CAM = 110
No Change = 111
Comp. Mask
None = 00
MR1 = 01
MR2 = 10
No Change
= 11
AR Inc/Dec
Increment
= 00
Decrement
= 01
Disable
= 10
No Change
= 11
Mode
Standard
= 00
Enhanced
= 01
Reserved
= 10
No Change
= 11
INSTRUCTION SET SUMMARY Continued
REGISTER BIT ASSIGNMENTS
Table 7: Instruction Cycle Lengths
CYCLE
LENGTH
Short
Medium
Long
Command Read
Status register or
16-bit register
Data Write
Comparand register
(not last segment)
Mask register
(not last segment)
Memory array
(NFA invalid)
Memory array
(NFA valid)
Comparand register
(last segment)
Mask register
(last segment)
Data Read
Comparand register
Mask register
Memory array
Note:
The specific timing requirements for Short, Medium, and Long cycles are given in the Switching Characteristics section under the
tELEH parameter. For two cycle Command Writes (TCO reg or any instruction with “aaaH” as the source or destination), the
first cycle is short, and the second cycle will be the length given.
CYCLE TYPE
Command write
MOV reg, reg (except L-70)
TCO reg (except CT)
TCO CT (non-reset, HMA invalid)
SPS, SPD, SFR
SBR, RSC
NOP (except L-70)
SFT (A)
MOV reg, mem
MOV reg, reg (L-70)
TCO CT (reset)
VBC (NFA invalid)
SFT (L)
NOP (L-70)
MOV mem, reg
TCO CT (non-reset, HMA valid)
CMP
SFF
VBC (NFA valid)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MU9C1480A-90DI | Content Addressable Memory |
| MU9C1480B-50TAC | Content Addressable Memory |
| MU9C1480B-70TAC | Content Addressable Memory |
| MU9C1480B-90TAC | Content Addressable Memory |
| MU9C1480B-90TAI | Content Addressable Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MU9C1480A-90DI | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Content Addressable Memory |
| MU9C1480B-50TAC | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Content Addressable Memory |
| MU9C1480B-70TAC | 制造商:MUSIC 制造商全稱(chēng):MUSIC Semiconductors 功能描述:LANCAM B Family |
| MU9C1480B-90TAC | 制造商:MUSIC 制造商全稱(chēng):MUSIC Semiconductors 功能描述:LANCAM B Family |
| MU9C1480B-90TAI | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Content Addressable Memory |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。