
MYSON
TECHNOLOGY
MTV016
MTV016 Revision 2.0 01/01/1999
4/11
There are 2 types of data that should be accessed through the serial data interface: ADDRESS bytes
and ATTRIBUTE bytes. The protocol is the same for both except for bit 6 of the row address. The MSB
(b7) bit is used to distinguish row and column addresses when transferring data from the external
controller. Bit 6 of the row address is used to distinguish the ADDRESS byte when it is set to "0" and the
ATTRIBUTE byte when it is set to "1", or to differentiate the column address for formats (a), (b) and (c),
respectively. The configuration of transmission formats is shown in Table 1:
Table 1. Configuration of Transmission Formats
Address
Row
Columnab
BYTES
Columnc
Row
Columnab
BYTES
Columnc
b7
1
0
0
1
0
0
b6
0
0
1
1
0
1
b5
x
x
x
x
x
x
b4
x
C4
C4
x
C4
C4
b3
R3
C3
C3
R3
C3
C3
b2
R2
C2
C2
R2
C2
C2
b1
R1
C1
C1
R1
C1
C1
b0
R0
C0
C0
R0
C0
C0
Format
a,b,c
a,b
c
a,b,c
a,b
c
ADDRESS
ATTRIBUTE
Initiate
ROW
COL
c
COL
ab
DA
c
DA
ab
1, X
0 1
0 0
X X
X X
0 1
1, X
1, X
format (a)
format (b)
format (c)
X, X
0, X
Input = b7, b6
0, 0
Figure 4. Transmission State Diagram
The data transmission is permitted to change from format (a) to formats (b) and (c), or from format (b) to
format (a), but not from format (c) back to formats (a) and (b). The alternation between formats is
configured as the state diagram shown in Figure 4.
3.2 Address Bus Administrator
The administrator manages bus address arbitration of internal registers during external data writing. The
external data, which is written to registers through the serial data interface, must be synchronized by
internal display timing. In addition, the administrator also provides automatic incrementing to the
address bus when external writing using format (c).
3.3 Vertical Display Control
The vertical display control can generate different vertical display sizes for most display standards in
current monitors. The vertical display size is calculated with the information of the double character
height bit (CHS) and the vertical display height control register (CH6-CH0). The algorithm of repeating