參數(shù)資料
型號(hào): MTV012A
廠商: Electronic Theatre Controls, Inc.
英文描述: 8051 Embedded CRT Monitor Controller Mask Version
中文描述: CRT顯示器8051嵌入式控制器掩模版
文件頁數(shù): 5/14頁
文件大?。?/td> 102K
代理商: MTV012A
MYSON
TECHNOLOGY
MTV012A
MTV012A Revision 1.1 12/23/1998
5/14
4. H/V SYNC Processing
The H/V SYNC processing block performs the functions of composite signal separation, SYNC input
presence check, frequency counting, and polarity detection and control, as well as protection of
VBLANK output while VSYNC speeds up to a high DDC communication clock rate. The present and
frequency function block treat any pulse shorter than 1 OSC period as noise.
4.1 Composite SYNC Separate
MTV012A continuously monitors the input HSYNC. If the vertical SYNC pulse can be extracted from the
input, a CVpre flag is set and the user can select the extracted "CVSYNC" for the source of polarity
check, frequency count and VBLANK. The CVSYNC will have a 10-16 us delay compared to the original
signal. The delay depends on the OSC frequency and composite mix method.
4.2 H/V Frequency Counter
MTV012A can discriminate between HSYNC/VSYNC frequency and saves the information in XFRs. The
15-bit H counter counts the time of the 64xHSYNC period, but only 11 upper bits are loaded into the
HCNTH/HCNTL latch.
The 11-bit output value will be (2/Hfreq) / (1/OSCfreq), updated once per VSYNC/CVSYNC period when
VSYNC/CVSYNC is present, or continuously updated when VSYNC/CVSYNC is not present. The 14-bit
V counter counts the time between 2 VSYNC pulses, but only 9 upper bits are loaded into the
VCNTH/VCNTL latch. The 9-bit output value will be (1/Vfreq) / (512/OSCfreq), updated every
VSYNC/CVSYNC period. An extra overflow bit indicates the condition of H/V counter overflow. The
VFchg/HFchg interrupt is active when VCNT/HCNT value changes or overflows. Tables 4.2.1 and 4.2.2
show the HCNT/VCNT value under the 8MHz OSC operations.
4.2.1 H-Freq Table
Output Value (11 bits)
H-Freq(KHZ)
8MHz OSC (hex / dec)
215h / 533
1FBh / 507
1DDh /477
1C2h / 450
1B2h / 434
1A5h / 421
190h / 400
14Dh / 333
140h / 320
118h / 280
10Ah / 266
0FAh / 250
0A0h / 160
12MHz OSC (hex / dec)
320h / 800
2F9h / 761
2CCh / 716
2A4h / 676
28Ch / 652
277h / 631
258h / 600
1F4h / 500
1E0h / 480
1A5h / 421
190h / 400
177h / 375
0F0h / 240
1
2
3
4
5
6
7
8
9
10
11
12
13
30
31.5
33.5
35.5
36.8
38
40
48
50
57
60
64
100
*1. The H-Freq output (HF10 - HF0) is valid.
*2. The tolerance deviation is + 1 LSB.
4.2.2 V-Freq Table
Output Value (9 bits)
V-Freq(Hz)
8MHz OSC (hex / dec)
115h / 277
104h / 260
104h / 260
103h / 259
12MHz OSC (hex / dec)
1A0h / 416
187h / 391
186h / 390
184h / 388
1
2
3
4
56.25
59.94
60
60.32
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