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參數(shù)資料
| 型號(hào)： | MTP4N50E |
| 廠商： | MOTOROLA INC |
| 元件分類： | JFETs |
| 英文描述： | TMOS POWER FET 4.0 AMPERES 500 VOLTS RDSon = 1.5 OHMS |
| 中文描述： | 4 A, 500 V, 1.5 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 254K |
| 代理商： | MTP4N50E |
5
Motorola TMOS Power MOSFET Transistor Device Data
GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 11. Capacitance Variation
C
VGS
VDS
VDS = 0
0
Ciss
Coss
Crss
2000
1500
1000
25
20
10
0
5
10
Figure 12. Gate Charge versus
Gate–To–Source Voltage
QG, TOTAL GATE CHARGE (nC)
16
0
0
20
12
8
4
30
40
50
5
15
500
VDS = 100 V
V
TJ = 25
°
C
ID = 4 A
400 V
250 V
TJ = 25
°
C
VGS = 0
10
COMMUTATING SAFE OPERATING AREA (CSOA)
The Commutating Safe Operating Area (CSOA) of
Figure 14 defines the limits of safe operation for commutated
source–drain current versus re–applied drain voltage when
the source–drain diode has undergone forward bias. The
curve shows the limitations of IFM and peak VDS for a given
rate of change of source current. It is applicable when wave-
forms similar to those of Figure 13 are present. Full or half–
bridge PWM DC motor controllers are common applications
requiring CSOA data.
Device stresses increase with increasing rate of change of
source current so dIs/dt is specified with a maximum value.
Higher values of dIs/dt require an appropriate derating of IFM,
peak VDS or both. Ultimately dIs/dt is limited primarily by de-
vice, package, and circuit impedances. Maximum device
stress occurs during trr as the diode goes from conduction to
reverse blocking.
VDS(pk) is the peak drain–to–source voltage that the device
must sustain during commutation; IFM is the maximum for-
ward source–drain diode current just prior to the onset of
commutation.
VR is specified at 80% of V(BR)DSS to ensure that the
CSOA stress is maximized as IS decays from IRM to zero.
RGS should be minimized during commutation. TJ has only
a second order effect on CSOA.
Stray inductances in Motorola’s test circuit are assumed to
be practical minimums. dVDS/dt in excess of 10 V/ns was at-
tained with dIs/dt of 400 A/
μ
s.
I
Figure 13. Commutating Safe Operating Area (CSOA)
0
100
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
200
300
400
6
4
2
0
+
+
–
Figure 14. Commutating Safe Operating Area
Test Circuit
VR
VGS
IFM
20 V
RGS
DUT
IS
Li
VR = 80% OF RATED VDS
VdsL = Vf + Li
dls/dt
–
di/dt
≤
75 A/
μ
s
500
VDS
600
Figure 15. Commutating Waveforms
15 V
VGS
0
90%
IFM
dls/dt
IS
10%
trr
IRM
ton
VDS
Vf
VdsL
dVDS/dt
VDS(pk)
MAX. CSOA
STRESS AREA
VR
0.25 IRM
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