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MT90869
Data Sheet
8
Zarlink Semiconductor Inc.
LCSTo0-3
C17, C16, B16, A16
Local Output Channel High Impedance Control (5V Tolerant Three-state
Outputs).
Active high output enable which may be used to control external buffering
individually for a set of local output streams on a per channel basis.
LCSTo0 is the output enable for LSTo[0,4,8,12,16,20,24,28],
LCSTo1 is the output enable for LSTo[1,5,9,13,17,21,25,29],
LCSTo2 is the output enable for LSTo[2,6,10,14,18,22,26,30],
LCSTo3 is the output enable for LSTo[3,7,11,15,19,23,27,31].
Refer to descriptions of the
LORS
and
ODE
pins for control of the output High or
High-Impedance state.
ODE
A12
Output Drive Enable (5V Tolerant, Internal pull-up).
An asynchronous input providing Output Enable control to the BSTo0- 31, LSTo0-
31, BCSTo0-3 and LCSTo0-3 outputs.
When LOW, the BSTo0-31 and LSTo0- 31 outputs are driven high or high
impedance (dependent on the
BORS
and
LORS
pin settings respectively) and the
outputs BCSTo0-3 and LCSTo0-3 are driven low.
When HIGH, the outputs BSTo0- 31, LSTo0-31, BCSTo0-3 and LCSTo0-3 are
enabled.
BORS
K2
Backplane Output Reset State (5V Tolerant, Internal pull-down).
When this input is LOW the device will initialize with the BSTo0-31 outputs driven
high, and the BCSTo0-3 outputs driven low. Following initialization, the Backplane
stream outputs are always active and a high impedance state, if required on a per-
channel basis, may be implemented with external buffers controlled by outputs
BCSTo0-3.
When this input is HIGH, the device will initialize with the BSTo0-31 outputs at high
impedance and the BCSTo0-3 outputs driven low. Following initialization, the
Backplane stream outputs may be set active or high impedance using the
ODE
pin
or on a per-channel basis with the
BE
bit in Backplane Connection Memory.
LORS
K19
Local Output Reset State (5V Tolerant, Internal pull-down).
When this input is LOW, the device will initialize with the LSTo0-31 outputs driven
high and the LCSTo0-3 outputs driven low. Following initialization, the Local
stream outputs are always active and a high impedance state, if required on a per-
channel basis, may be implemented with external buffers controlled by the
LCSTo0-3.
When this input is HIGH, the device will initialize with the LSTo0-31 outputs at high
impedance and the LCSTo0-3 driven low. Following initialization, the Local stream
outputs may be set active or high impedance using the
ODE
pin or on a per-
channel basis with the
LE
bit in Local Connection Memory.
NC
Y12, Y13
No Connect
No connection to be made.
IC0
A2, A20, B6, B10,
B17, C3, C9, D16,
U2, U3, V2, V3, V11,
V12, V15, V16, W10,
W11, W15, W16,
W17, W20, Y3, Y10,
Y15, Y16
Internal Connects
These inputs MUST be held LOW.
Pin Description (continued)
Name
Package
Coordinates
Description