
MT9044
Advance Information
16
Rise & Fall Time:
Duty Cycle:
8ns (0.5V 4.5V 50pF)
45% to 55%
The output clock should be connected directly (not
AC coupled) to the OSCi input of the MT9044, and
the OSCo output should be left open as shown in
Figure 9.
Crystal Oscillator
- Alternatively, a Crystal
Oscillator may be used. A complete oscillator circuit
made up of a crystal, resistor and capacitors is
shown in Figure 10.
Figure 10 - Crystal Oscillator Circuit
The accuracy of a crystal oscillator depends on the
crystal tolerance as well as the load capacitance
tolerance. Typically, for a 20MHz crystal specified
with a 32pF load capacitance, each 1pF change in
load capacitance contributes approximately 9ppm to
the frequency deviation. Consequently, capacitor
tolerances, and stray capacitances have a major
effect on the accuracy of the oscillator frequency.
The trimmer capacitor shown in Figure 10 may be
used to compensate for capacitive effects. If
accuracy is not a concern, then the trimmer may be
removed, the 39pF capacitor may be increased to
56pF, and a wider tolerance crystal may be
substituted.
The crystal should be a fundamental mode type - not
an overtone. The fundamental mode crystal permits
a simpler oscillator circuit with no additional filter
components and is less likely to generate spurious
responses. The crystal specification is as follows.
Frequency:
Tolerance:
Oscillation Mode:
Resonance Mode:
Load Capacitance:
Maximum Series Resistance:
Approximate Drive Level:
20MHz
As required
Fundamental
Parallel
32pF
35
1mW
e.g., CTS R1027-2BB-20.0MHZ
(
±
20ppm absolute,
±
6ppm 0C to 50C, 32pF 25
)
Guard Time Adjustment
Excessive switching of the timing reference (from
PRI to SEC) in the MT9044 can be minimized by first
entering Holdover Mode for a predetermined
maximum time (i.e., guard time). If the degraded
signal returns to normal before the expiry of the
guard time (e.g. 2.5 seconds), then the MT9044 is
returned to its Normal Mode (with no reference
switch taking place). Otherwise, the reference input
may be changed from Primary to Secondary.
Figure 11 - Symmetrical Guard Time Circuit
A simple way to control the guard time (using
Automatic Control) is with an RC circuit as shown in
Figure 11. Resistor R
P
is for protection only and
limits the current flowing into the GTi pin during
power down conditions. The guard time can be
calculated as follows.
V
SIH
is the logic high going threshold level for the
GTi Schmitt Trigger input, see DC Electrical
Characteristics
In cases where fast toggling might be expected of
the LOS1 input, then an unsymmetrical Guard Time
Circuit is recommended. This ensures that reference
switching doesn’t occur until the full guard time value
has expired. An unsymmetrical Guard Time Circuit
is shown in Figure 12.
OSCo
56pF
1M
39pF
3-50pF
20MHz
MT9044
OSCi
100
1uH
1uH inductor: may improve stability and is optional
GTi
C
10uF
R
150k
MT9044
GTo
+
R
P
1k
guardtime
RC
VDD
–
VDD
VSIH
---------------------------------
ln
×
=
guardtime
RC
0.6
×
≈
guardtime
150
k
10
u
×
0.6
0.9
s
=
×
≈
example