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| 型號： | MT8930B |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | () |
| 中文描述： | （） |
| 文件頁數(shù)： | 11/29頁 |
| 文件大?。?/td> | 277K |
| 代理商： | MT8930B |
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Application Note
MSAN-141
A-211
and compare this bit with the last bit transmitted on
the D-channel. If the bits are the same, the TE will
continue transmitting. If the comparison differs, a
collision has occurred and the TE will immediately
stop transmitting on the D-channel, generate an
interrupt through the Dcoll bit, reset the DCack bit on
the next frame pulse, and restart the counting
process. If the D-channel is sourced from the on-chip
HDLC, the packet will be depleted from the FIFO
without being transmitted on the S or ST-BUS.
2.5
Clocking
The subscriber loop, (S/T interface), is a fully
synchronized carrier where the transmitted frame
from the NT is phase aligned to the transmitted TE
frame. The transmitted F-bit of each TE frame is
delayed by two bits with respect to the received F-bit
of the NT frame (refer to Figure 3).
In a typical application, the NT will derive its timing
source directly from the network clock. A TE, on the
other hand, will derive its timing from the received
line signal. Certain applications, such as key
systems and small PBXs, will require multiple TEs to
have a phase related clock in order to make use of a
common backplane. Such an option is provided in
the SNIC and is called the NT slave mode.
2.5.1
NT Slave
As mentioned above, some applications require a
common system clock for multiple TEs. Setting bit B1
in the NT C-channel Diagnostics Register will allow
the SNIC to operate in a TE mode using external
timing source. A typical configuration is described in
Figure 6. The NT slaves would derive their clocks
from an SNIC which is in a TE mode. The timing
signals generated from the TE (i.e., C4b and F0b)
will be used as the system clocks for the remaining
NT slaves. This allows the ST-BUS outputs to be
daisy chained using F0od pulse, allowing the ST-
BUS to be used as a backplane. NT slaves can
tolerate up to
±
2.5
μ
s differential delay between the
receive frame at the TE providing the timebase and
their own receive signal.
2.6
Loop Configurations
The wiring configuration of the subscriber loop is
assumed to be one continuous cable consisting of a
point-to-point or point-to-multipoint loop which will be
terminated at both ends with an appropriate
termination resistor (100 ohms). For a point-to-point
or extended passive bus wiring configurations, the
NT must be placed in the adaptive timing mode (B3
of NT C-channel control register to logic 1). This will
allow the timing recovery circuit to track the phase
impairment
introduced
medium. In a short passive bus loop configuration
this adaptive timing is an undesired effect as the line
signal from the various sources will have different
phase impairments. Therefore, the timing recovery
circuit must not try to track the phase impairment as
the phase of each bit received may vary up to 4
μ
sec. Therefore, in the short passive bus, the NT
must be placed in a fixed timing mode. This is
accomplished by setting B4 of NT C-channel Control
Register to logic 0. Further descriptions of each loop
configuration follows.
by
the
transmission
2.6.1
Point-to-Point
In the point-to-point wiring configuration only one NT
and one TE are active at any one time for either
direction of transmission (refer to Figure 7). The
SNIC is placed in the point-to-point mode by setting
the Timing bit (B4) of the NT mode C-channel
Control Register to a binary 1. This bit will enable the
adaptive timing circuit which will allow the SNIC to
operate with 10 to 42 microseconds of loop delay.
The maximum line length for the point-to-point bus is
limited by the attenuation of the signal as well as the
round trip delay introduced from the line (i.e., delay
on the E-echo).
2.6.2
Short Passive Bus
The short passive bus is a point-to-multipoint wiring
configuration which allows more then one TE to
communicate with a single NT (refer to Figure 8).
The positioning of the TEs on the short passive bus
is not restricted along the full length of the cable.
Figure 10 - NT in Star Configuration
V
DD
to TE
to TE
STAR
F0b
DSTi
STAR
F0b
DSTi
SNIC
NT
to TE
to TE
System
Frame Pulse
Input
ST-BUS Stream
Output
ST-BUS Stream
STAR
F0b
DSTi
DSTo
STAR
F0b
DSTi
10K
SNIC
NT
SNIC
NT
SNIC
NT
相關(guān)PDF資料 |
PDF描述 |
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| MT8931B | () |
| MT8930C-1 | SWITCH, ON-OFF, CHROM/BLK BTN; Switch function type:SPST Latching; Voltage, contact AC max:125V; Voltage, contact DC max:24V; Temp, op. max:85(degree C); Temp, op. min:-40(degree C); Diameter, panel cut-out:13.6mm; Length / Height, RoHS Compliant: Yes |
| MT8930C | Subscriber Network Interface Circuit(用戶網(wǎng)絡(luò)接口電路（提供點到點或點到多點數(shù)字傳送）) |
| MT8930 | CMOS ST-BUS⑩ FAMILY Subscriber Network Interface Circuit Preliminary Information |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT8930BC | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Subscriber Network Interface Circuit |
| MT8930BE | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Subscriber Network Interface Circuit |
| MT8930BP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Subscriber Network Interface Circuit |
| MT8930C | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Subscriber Network Interface Circuit |
| MT8930C-1 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS ST-BUS⑩ FAMILY Subscriber Network Interface Circuit |
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