參數(shù)資料
型號: MT55L128L32P1
廠商: Micron Technology, Inc.
英文描述: 3.3V I/O,128K x 32,F(xiàn)low-Through ZBT SRAM(3.3V輸入/輸出,4Mb流通式同步靜態(tài)存儲器)
中文描述: 3.3V的I / O的128K的× 32,流量通過ZBT SRAM的電壓(3.3V輸入/輸出,4Mb的流通式同步靜態(tài)存儲器)
文件頁數(shù): 13/25頁
文件大小: 434K
代理商: MT55L128L32P1
13
4Mb: 256K x 18, 128K x 32/36 Pipelined ZBT SRAM
MT55L256L18P1_2.p65
Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
PRELIMINARY
4Mb: 256K x 18, 128K x 32/36
PIPELINED ZBT SRAM
State Diagram for ZBT SRAM
DESELECT
BEGIN
READ
BURST
READ
BEGIN
WRITE
DS
DS
DS
BURST
WRITE
READ
DS
WRITE
WRITE
BURST
READ
WRITE
READ
BURST
BURST
READ
BURST
DS
WRTE
KEY:
COMMAND
DS
READ
WRITE
BURST
OPERATION
DESELECT
New READ
New WRITE
BURST READ,
BURST WRITE or
CONTINUE DESELECT
BURST
READ
WRITE
NOTE:
1. A STALL or IGNORE CLOCK EDGE cycle is not shown in the above diagram. This is because CKE# HIGH only blocks the
clock (CLK) input and does not change the state of the device.
2. States change on the rising edge of the clock (CLK).
相關PDF資料
PDF描述
MT55L128L36P1 3.3V I/O,128K x 36,F(xiàn)low-Through ZBT SRAM(3.3V或輸入/輸出,4Mb流通式同步靜態(tài)存儲器)
MT55L128V32P1 2.5V I/O,128K x 32,F(xiàn)low-Through ZBT SRAM(2.5V輸入/輸出,4Mb流通式同步靜態(tài)存儲器)
MT55L128V36P1 2.5V I/O,128K x 36,F(xiàn)low-Through ZBT SRAM(2.5V輸入/輸出,4Mb流通式同步靜態(tài)存儲器)
MT55L256L18P1 3.3V I/O,256K x 18,Flow-Through ZBT SRAM(3.3V輸入/輸出,4Mb流通式同步靜態(tài)存儲器)
MT55L256V18P1 2.5V I/O,256K x 18,Flow-Through ZBT SRAM(2.5V輸入/輸出,4Mb流通式同步靜態(tài)存儲器)
相關代理商/技術參數(shù)
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