參數(shù)資料
型號(hào): MT48LC16M8A2
廠商: Micron Technology, Inc.
英文描述: SYNCHRONOUS DRAM
中文描述: 同步DRAM
文件頁數(shù): 39/59頁
文件大?。?/td> 1844K
代理商: MT48LC16M8A2
39
128Mb: x4, x8, x16 SDRAM
128MSDRAM_E.p65
Rev. E; Pub. 1/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
128Mb: x4, x8, x16
SDRAM
CLOCK SUSPEND MODE
1
tCH
tCL
tCK
tAC
tLZ
DQM /
DQML, DQMH
CLK
A0-A9, A11
DQ
BA0, BA1
A10
tOH
D
OUT
m
tAH
tAS
tAH
tAS
tAH
tAS
BANK
tDH
D
OUT
e
tAC
tHZ
D
OUT
m
+ 1
COMMAND
tCMH
tCMS
NOP
NOP
NOP
NOP
NOP
READ
WRITE
DON
T CARE
UNDEFINED
CKE
tCKS
tCKH
BANK
COLUMN
m
tDS
D
OUT
e
+ 1
NOP
tCKH
tCKS
tCMH
tCMS
2
COLUMN
e
2
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
NOTE:
1. For this example, the burst length = 2, the CAS latency = 3, and auto precharge is disabled.
2. x16: A9 and A11 =
Don
t Care
x8: A11 =
Don
t Care
*CAS latency indicated in parentheses.
-7E
-75
-8E
SYMBOL*
t
CKS
t
CMH
t
CMS
t
DH
t
DS
t
HZ(3)
t
HZ(2)
t
LZ
t
OH
MIN
1.5
0.8
1.5
0.8
1.5
MAX
MIN
1.5
0.8
1.5
0.8
1.5
MAX
MIN
2
1
2
1
2
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
5.4
5.4
5.4
6
6
6
1
3
1
3
1
3
TIMING PARAMETERS
-7E
-75
-8E
SYMBOL*
t
AC (3)
t
AC (2)
t
AH
t
AS
t
CH
t
CL
t
CK (3)
t
CK (2)
t
CKH
MIN
MAX
5.4
5.4
MIN
MAX
5.4
6
MIN
MAX
6
6
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.8
1.5
2.5
2.5
7
7.5
0.8
0.8
1.5
2.5
2.5
7.5
10
0.8
1
2
3
3
8
10
1
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