
Semiconductor
MSM9223
4/24
PIN DESCRIPTIONS
Pin
Type
Description
1, 51
—
Power supply pins.
Pin1 and pin51 should be connected externally.
8—
26
—
40 to 50,
52 to 59
O
D-GND is ground pin for the VFD driver circuit. L-GND is ground pin for the
logic circuit. Pins 8 and 26 should be connected externally.
Segment (anode) signal output pins for a VFD tube.
These pins can be directly connected to the VFD tube. External circuit is not required.
IOH–5 mA
60 to 64,
2 to 4
O
Segment (anode) signal output pins for a VFD tube.
These pins can be directly connected to the VFD tube. External circuit is not required.
IOH–10 mA
5, 6, 7
O
Inverted Grid signal output pins.
For pre-driver, the external circuit is requiend.
IOL10 mA
29
I
Chip Select input pin.
Data input/output operation is valid when this pin is set at a High level.
28
I
Serial clock input pin.
Data is input and/or output through the DATA I/O pin at the rising edge of the serial clock.
27
I/O
Serial data input/output pin.
Data is input to / comes out from the shift register at the rising edge of the serial clock.
23
I
Duplex/Triplex operation select input pin.
Duplex (1/2 duty) operation is selected when this pin is set at a VCC level.
Triplex (1/3 duty) operation is selected when this pin is set at a GND level.
Symbol
VDD
D-GND
L-GND
SEG1 to 19
SEG20 to 27
GRID1 to 3
CS
CLOCK
DATA I/O
DUP/TRI
24
O
VCC
5V output pin for internal logic portion and external logic circuit.
33
O
VREG
Reference voltage (5V) output pin for A/D converter.
22
O
Interrupt signal output to microcontroller. When any key of key matrix is pressed
or released, key scanning is started. After the completion of the one cycle, this pin
goes to high level and keeps the high level until keyscan stop mode is selected.
INT
20, 21
O
Input pin for the encoder type rotary switch. Each input has chattering
absorption function of 620ns typical.
A1, B1
34 to 39
I
CH1 to 6
Analog voltage input pin for the 8-bit A/D converter.
14 to 18
I
Return inputs from the key matrix.
These pins are active low. When key matrix are in the inactive sate, these
pins are at high level through the internal pull-up resistors. All the inputs do
not have the cahttering absorption function for the keyscans.
COL1 to 5
9 to 13
O
Key switch scanning outputs.
Normally low level is output through these pin. When any switch of key matrix
is depressed or released, key scanning is started and is continued until
keyscan stop mode is selected. When keyscan stop mode is selected, all
outputs of ROW1 to 5 go back to low level.
ROW1 to 5