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參數(shù)資料
| 型號： | MSM9223 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 27-Bit Duplex/Triplex VFD Controller/Driver with Digital Dimming, ADC and Keyscan |
| 中文描述： | 27位雙/三層VFD控制器/驅(qū)動器，帶有數(shù)字調(diào)光，ADC和鍵盤掃描 |
| 文件頁數(shù)： | 11/25頁 |
| 文件大?。?/td> | 237K |
| 代理商： | MSM9223 |
Semiconductor
MSM9223
19/24
2) UP/DOWN COUNTER
When the UP/DOWN COUNTER is input UP, it counts up and when it is input DOWN, it counts
down.
But if overcounte of "111" occurs the UP/DOWN COUNTER stays "111".
Fig.4
3) Direction latch
When the Direction latch is input DOWN the output R goes "1". But if the UP pulse is input and
the counts value change to plus value, the output R goes to "0".
Fig.5
Fig.3 The Input and Output Timing in Case of Counter Clockwise.
DOWN (internal)
B
A
INT
chattering absorption time
B
Q3, Q2, Q1
A
001
010
011
100
101
110
111
B
Q1, Q2, Q3
A
010
100
000
010
R1
1-2) counter clockwise
When signal A and B input as fig. 3, the phase detection circuit outputs Down signal after the
chattering absorption period. At this time, the output INT also goes to High level. The INT stays
High level until the switch data-output mode is selected.
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