- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98044 > MSM6262-XXGS-BK (OKI ELECTRIC INDUSTRY CO LTD) 48 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80 PDF資料下載
參數(shù)資料
| 型號： | MSM6262-XXGS-BK |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 顯示控制器 |
| 英文描述： | 48 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80 |
| 封裝： | 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 11/52頁 |
| 文件大?。?/td> | 383K |
| 代理商： | MSM6262-XXGS-BK |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
Semiconductor
MSM6262-xx
19/52
FUNCTIONAL DESCRIPTION
1. Instruction Register (IR) and Data Register (DR)
The MSM6262-xx has two registers, instruction register (IR) and data register (DR).
IR is used to store the address code or instruction code of display data RAM (DD RAM) or
character generator RAM (CG RAM).
This register can be written by the CPU, but cannot be read out by the CPU.
DR is used to store the data to write into (or read out) the data to/from DD RAM or CG RAM.
The data written into DR by the CPU is automatically written into the DD RAM or CG RAM.
When an address code is written into IR, the data of the specified address is automatically
transferred to the DR from either DD RAM or CG RAM. By having the CPU subsequently read
the DR, it is possible to verify DD RAM or CG RAM data.
After the writing of DR by the CPU, the DD RAM or CG RAM of the next address is selected
to be ready for the next CPU writing.
Likewise, after the reading operation of the CPU, DD RAM or CG RAM data of the next
address is transferred to the DR, when CPU is ready for the next reading operation.
2. Busy Flag (BF)
When the output of BUSY 1 OUT is "H", MSM6262-xx is engaged in internal operation.
When the output of BUSY 2 OUT is "H", it indicates that MSM6262-xx is engaged in internal
operation or MSM6262-xx is engaged in the revising of the display starting line on the LCD.
(Refer to the instruction table.)
When the output of BUSY 1 OUT is "H", any input of new instruction is ignored. So, before
setting a new instruction, it is necessary to check whether BUSY 1 OUT and BUSY 2 OUT are
at "L".
3. Address Counter (ADC)
The address counter (ADC) allocates the address for the DD RAM and CG RAM write/read
and also for the cursor display.
When the instruction code for a DD RAM address or CG RAM address setting is input to IR,
after deciding whether it is DD RAM or CG RAM, the address counter code is transferred from
IR to ADC. After writing (reading) the display data to (from) the DD RAM or CG RAM, the
ADC increments (or decrements) by 1 automatically as its internal operation.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM63182A-XXX | 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC107 |
| MSM63184-XXX | 4-BIT, MROM, MICROCONTROLLER, UUC |
| MSM63184-XXXGS-K | 4-BIT, MROM, MICROCONTROLLER, PQFP128 |
| MSM63184B-XXX | 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC123 |
| MSM63188-XXX | 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC159 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM6295 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:4-CHANNEL MIXING ADPCM VOICE SYNTEHSIS LSI |
| MSM6295GS-2K | 制造商:ROHM Semiconductor 功能描述: |
| MSM6295GS-K | 制造商:OKI Semiconductor 功能描述:Speech Recording IC |
| MSM62X42 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:REAL TIME CLOCK IC WITH BUILT-IN CRYSTAL |
| MSM62X42B | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:REAL TIME CLOCK IC WITH BUILT-IN CRYSTAL |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。