參數(shù)資料
型號(hào)： MSM60804GS-K4
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 總線控制器
英文描述： PCMCIA BUS CONTROLLER, PQFP208
封裝： 28 X 28 MM, 0.50 MM PITCH, PLASTIC, QFP-208
文件頁(yè)數(shù)： 54/54頁(yè)
文件大?。?/td> 978K
代理商： MSM60804GS-K4
7
MSM60804
Semiconductor
PIN DESCRIPTION
Symbol
I
Description
24
Drive current
(mA)
System Interface Pin
LA [23 : 17]
SA [16 : 0]
—
I/O
Pin
System Address Bus
The address bus lines of host system interface.
These lines enable direct addressing of the 16MB memory space
on the card. In the Word Access mode, SA0 is not used.
These lines are connected to LA[23:17] and SA[16;0] of the 16-bit
ISA system.
I/O
16
D [15 : 0]
16
I
1
RSTD
—
I
1
ISAPWR
—
I
1
BALE
—
I
1
SCLK
—
I
1
IOWR
—
I
1
IORD
—
OD
1
IC16
16
OD
1
IRDY
16
System Data bus
The bidirectional 16-bit data bus lines of host system interface.
The lower byte D[7:0] is also used to access a register in the PCIC.
When the MSM60804 is connected to an 8-bit system, pins of the
higher byte are pulled up.
System Reset Drive
An active-high System Reset signal
This signal is used to reset the PCIC and also drive the Base Address
Select signal of a register in the PCIC.
ISA Power Supply
This pin selects an interface type of pins connected to the system:
high for 5V TTL interface or low for the other interface type (3V TTL
interface or 5V/3V CMOS interface). This pin is internally pulled up.
Bus Address Latch Enable
This pin is active high and used to latch LA[23:17] at the start of
bus cycle timing.
System Clock
A system clock input of the ISA
This pin determines/ICHK timing and /MEMR and /MEMW delays
in 16-bit accessing. The pulse width of /ICHK is three times as
wide as the clock cycle. When a bus cycle wait is set by a register,
the pulse width of IRDY is equal to one SCLK (1 wait).
I/O Port Write
An active-low I/O Write signal
This pin drives data output to an I/O port pointed to by a system address.
I/O Port Read
An active-low I/O Read signal
This pin drives data input from an I/O port pointed to by a system
address.
16bit I/O Select
An active-low signal, indicating the host system that the PC card
is in the 16-bit I/O Access mode.
I/O Channel Ready
An active high signal, indicating the host system that the memory
or I/O bus cycle has completed, while this signal is low, the host system
is requested to wait.
相關(guān)PDF資料
PDF描述
MSM6222B-XXGS-L 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
MSM6240GS-K 64 X 16 CHARACTERS DOT MAT LCD DSPL CTLR, PQFP60
MSM6262-01GS-V1K 48 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
MSM6262-04GS-BK 48 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
MSM6262-XXGS-BK 48 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MSM60808 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:PCI to PCMCIA R2.1/CardBus Controller (PPCC)
MSM60808GS-K 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:PCI to PCMCIA R2.1/CardBus Controller (PPCC)
MSM6100 制造商:QUALCOMM 制造商全稱:QUALCOMM 功能描述:MSM6100
MSM610W9 制造商:Ssac 功能描述:
MSM6150 制造商:QUALCOMM 制造商全稱:QUALCOMM 功能描述:MSM6150 CHIPSET SOLUTION
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*