參數(shù)資料
型號： MSM60804GS-K4
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 總線控制器
英文描述： PCMCIA BUS CONTROLLER, PQFP208
封裝： 28 X 28 MM, 0.50 MM PITCH, PLASTIC, QFP-208
文件頁數(shù)： 47/54頁
文件大?。?/td> 978K
代理商： MSM60804GS-K4
49
MSM60804
Semiconductor
Global Control Register
The Global Control Register is shown below. The bits are defined below.
D7 D6 D5 D4 D3 D2 D1 D0
Slot A : Index value (base + 1Eh)
Slot B : Index value (base + 5Eh)
Power-Down Enable
Level Mode Interrupt Enable
Explicit Write Interrupt Enable
IRQ14 Pulse Mode Enable
Reserved
Global Control Register (Read/Write)
Global Control Register Description
Bit
Description
Bit 3
Bit 1
Bit 2
Bit 0
IRQ14 Pulse Mode Enable. When this bit is "1" and bit 1 is "0", an interrupt assigned to IRQ12 is set
to level mode. Note that when bit 1 is set to "1" for level mode this bit is ineffective.
Level Mode Interrupt Enable. This bit selects a mode for an interrupt signal, which is output to the
IRQ#. When set to "1", level mode interrupt is selected. When set to "0", edge-triggered mode
interrupt is selected.
While this bit is set to "1", the content of the Card Status Change registers (+04h and +44h) will not
be cleared after they are read. To clear the content of the register and reset the inturrupt, write "1" in
the corresponding bit of the Card Status Change register. If a status change interrupt is disabled
by the Card Status Change Interrupt Configuration registers (+05h and 45h) or the Card Detection
Control registers (+16h and +56h), even when a status change interrupt occurs while this bit is set
to "1", the Card Status Change register is cleared and the interrupt is reset.
Power-Down Enable
When this bit is set to "1", the Power Down mode is enabled.
When this bit is set to "0", the Power Down mode is disabled.
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