參數(shù)資料
型號： MSM60804GS-K4
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 總線控制器
英文描述： PCMCIA BUS CONTROLLER, PQFP208
封裝： 28 X 28 MM, 0.50 MM PITCH, PLASTIC, QFP-208
文件頁數(shù)： 44/54頁
文件大?。?/td> 978K
代理商： MSM60804GS-K4
47
MSM60804
Semiconductor
Bit
Description
Bit 0
16-Bit Memory Delay Inhibit. When this bit is set to "0" if 16-bit access (bit7 of System Memory
Address # Mapping Start High Byte Register is "1"),
WE and OE signals are output by one-stage
synchronization of
IMEMW and IMEMR, with the falling edge of ISYSCLK. When this bit is set to "1"
WE and OE signals are always output asynchronously with ISYSCLK. The timing diagram of SCLK
synchronization of
WE, OE is shown below.
Timing Diagram of IWE, OWE to SCLK
The SCLK synchronization of WE. OE is shown below.
SCLK Synchronization of WE, OE
When bit 7="1" and bit 0="0" of SMA #
Start HBR
SCLK
When bit 0="1"
MEMW
MEMR
OE
WE
OE
SCLK Sychronization of WE
, OE
Bit 7 of SMA#M Start HBR
Bit 0
No
0
Yes
10
No
11
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