參數(shù)資料
型號： MSC1202Y3RHHRG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC36
封裝： GREEN, PLASTIC, QFN-36
文件頁數(shù)： 81/93頁
文件大?。?/td> 1093K
代理商： MSC1202Y3RHHRG4
MSC1200
MSC1201
MSC1202
SBAS317E APRIL 2004 REVISED MAY 2006
www.ti.com
82
Milliseconds TImer Interrupt (MSINT)
7
6
5
4
3
2
1
0
Reset Value
SFR FAh
WRT
MSINT6
MSINT5
MSINT4
MSINT3
MSINT2
MSINT1
MSINT0
7Fh
The clock used for this timer is the 1ms clock, which results from dividing the system clock by the values in registers
MSECH:MSECL. Reading this register is necessary for clearing the interrupt; however, AI in EICON (SFR D8h) must also
be cleared.
WRT
Write Control. Determines whether to write the value immediately or wait until the current count is finished.
bit 7
Read = 0.
0 = Delay Write Operation. The MSINT value is loaded when the current count expires.
1 = Write Immediately. The MSINT counter is loaded once the CPU completes the write operation.
MSINT60
Milliseconds Count. Normal operation would use 1ms as the clock interval.
bits 60
MS Interrupt Interval = (1 + MSINT)
(MSEC + 1) tCLK
One Microsecond Timer (USEC)
7
6
5
4
3
2
1
0
Reset Value
SFR FBh
0
FREQ5
FREQ4
FREQ3
FREQ2
FREQ1
FREQ0
03h
FREQ50
Clock Frequency 1. This value + 1 divides the system clock to create a 1
s Clock.
bits 50
USEC = CLK/(FREQ + 1). This clock is used to set Flash write time. See FTCON (SFR EFh).
One Millisecond TImer Low Byte (MSECL)
7
6
5
4
3
2
1
0
Reset Value
SFR FCh
MSECL7
MSECL6
MSECL5
MSECL4
MSECL3
MSECL2
MSECL1
MSECL0
9Fh
MSECL70 One Millisecond Timer Low Byte. This value in combination with the next register is used to create a 1ms clock.
bits 70
1ms = (MSECH
256 + MSECL + 1) tCLK. This clock is used to set Flash erase time. See FTCON (SFR EFh).
One Millisecond Timer High Byte (MSECH)
7
6
5
4
3
2
1
0
Reset Value
SFR FDh
MSECH7
MSECH6
MSECH5
MSECH4
MSECH3
MSECH2
MSECH1
MSECH0
0Fh
MSECH70 One Millisecond Timer High Byte. This value in combination with the previous register is used to create a 1ms clock.
bits 70
1ms = (MSECH
256 + MSECL + 1) tCLK.
One Hundred Millisecond Timer (HMSEC)
7
6
5
4
3
2
1
0
Reset Value
SFR FEh
HMSEC7
HMSEC6
HMSEC5
HMSEC4
HMSEC3
HMSEC2
HMSEC1
HMSEC0
63h
WRT
Write Control. Determines whether to write the value immediately or wait until the current count is finished.
Read = 0.
HMSEC70 One Hundred Millisecond Timer. This clock divides the 1ms clock to create a 100ms clock.
bits 70
100ms = (MSECH
256 + MSECL + 1) (HMSEC + 1) tCLK.
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MSC1202Y3RHHT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Precision ADC & DAC w/8051 CPU & Flash RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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MSC1208 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:23-bit x 2 Duplex Controller/Driver with Digital Dimming and Keyscan Function
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