參數(shù)資料
型號(hào)： MSC1202Y3RHHRG4
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC36
封裝： GREEN, PLASTIC, QFN-36
文件頁(yè)數(shù)： 71/93頁(yè)
文件大小： 1093K
代理商： MSC1202Y3RHHRG4
MSC1200
MSC1201
MSC1202
SBAS317E APRIL 2004 REVISED MAY 2006
www.ti.com
73
Summation/Shifter Control (SSCON)
7
6
5
4
3
2
1
0
Reset Value
SFR E1h
SSCON1
SSCON0
SCNT2
SCNT1
SCNT0
SHF2
SHF1
SHF0
00h
The Summation register is powered down when the ADC is powered down. If all zeroes are written to this register, the 32-bit
SUMR30 registers will be cleared. The Summation registers will do sign-extend if Bipolar Mode is selected in ADCON1.
SSCON10 Summation/Shift Count.
bits 76
SSCON1
SSCON0
SCNT2
SCNT1
SCNT0
SHF2
SHF1
SHF0
DESCRIPTION
0
Clear Summation Register
0
1
0
CPU Summation on Write to SUMR0 (sum count/shift ignored)
0
1
0
CPU Subtraction on Write to SUMR0 (sum count/shift ignored)
1
0
x
Note (1)
CPU Shift only
0
1
Note (1)
x
ADC Summation only
1
Note (1)
ADC Summation completes, then shift completes
(1) Refer to register bit definition.
SCNT20
Summation Count. When the summation is complete an interrupt will be generated unless masked. Reading the
bits 53
SUMR0 register clears the interrupt.
SCNT2
SCNT1
SCNT0
SUMMATION COUNT
0
2
0
1
4
0
1
0
8
0
1
16
1
0
32
1
0
1
64
1
0
128
1
256
SHF20
Shift Count.
bits 20
SHF2
SHF1
SHF0
SHIFT
DIVIDE
0
1
2
0
1
2
4
0
1
0
3
8
0
1
4
16
1
0
5
32
1
0
1
6
64
1
0
7
128
1
8
256
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