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SAM9G45 [DATASHEET]
6438K–ATARM–12-Feb-13
31. Two-wire Interface (TWI)
31.1
Description
The Atmel Two-wire Interface (TWI) interconnects components on a unique two-wire bus, made up of one clock
line and one data line with speeds of up to 400 Kbits per second, based on a byte-oriented transfer format. It can
be used with any Atmel Two-wire Interface bus Serial EEPROM and IC compatible device such as Real Time
Clock (RTC), Dot Matrix/Graphic LCD Controllers and Temperature Sensor, to name but a few. The TWI is pro-
grammable as a master or a slave with sequential or single-byte access. Multiple master capability is supported. 20
Arbitration of the bus is performed internally and puts the TWI in slave mode automatically if the bus arbitration is
lost.
A configurable baud rate generator permits the output data rate to be adapted to a wide range of core clock
frequencies.
Below, Table 31-1 lists the compatibility level of the Atmel Two-wire Interface in Master Mode and a full I2C compat- ible device.
Note:
1. START + b000000001 + Ack + Sr
31.2
Embedded Characteristics
Compatibility with standard two-wire serial memory
One, two or three bytes for slave address
Sequential read/write operations
Supports either master or slave modes
Compatible with Standard Two-wire Serial Memories
Master, Multi-master and Slave Mode Operation
Bit Rate: Up to 400 Kbits
General Call Supported in Slave mode
Table 31-1.
Atmel TWI compatibility with I2C Standard
I2C Standard
Atmel TWI
Standard Mode Speed (100 kHz)
Supported
Fast Mode Speed (400 kHz)
Supported
7 or 10 bits Slave Addressing
Supported
Not Supported
Repeated Start (Sr) Condition
Supported
ACK and NACK Management
Supported
Slope control and input filtering (Fast mode)
Not Supported
Supported
Multi Master Capability
Supported