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參數(shù)資料
| 型號(hào)： | MPR081QR2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, QCC16 |
| 封裝： | 5 X 5 MM, 1 MM HEIGHT, ROHS COMPLIANT, QFN-16 |
| 文件頁數(shù)： | 22/22頁 |
| 文件大?。?/td> | 324K |
| 代理商： | MPR081QR2 |
MPR081
Sensors
Freescale Semiconductor
9
Any bytes received after the command byte are data bytes.
The first data byte goes into the internal register of the
MPR081 selected by the command byte (Figure 10).
Figure 10. Command and Single Data Byte Received
If multiple data bytes are transmitted before a STOP
condition is detected, these bytes are generally stored in
subsequent MPR081 internal registers because the
command byte address generally auto-increments (Table 8).
MESSAGE FORMAT FOR READING THE MPR081
The MPR081 is read using the MPR081's internally stored
command byte as address pointer, the same way the stored
command byte is used as address pointer for a write. The
pointer generally auto-increments after each data byte is read
using the same rules as for a write (Table 11). Thus, a read is
initiated by first configuring the MPR081's command byte by
performing a write (Figure 9). The master can now read 'n'
consecutive bytes from the MPR081, with the first data byte
being read from the register addressed by the initialized
command byte. When performing read-after-write
verification, remember to re-set the command byte's address
because the stored command byte address will generally
have been auto-incremented after the write (Table 8).
Figure 11. ‘n’ Data Bytes Received
OPERATION WITH MULTIPLE MASTERS
If the MPR081 is operated on a 2-wire interface with
multiple masters, a master reading the MPR081 should use
repeated start(s) between the write(s) which sets the
MPR081's address pointer, and the read(s) that take the data
from the location(s). This is because it is possible for master
#2 to take over the bus after master #1 has set up the
MPR081's address pointer, but before master #1 has read
the data. If master #2 subsequently re-sets the master of the
MPR08's address pointer, then master #1's read may be from
an unexpected location.
DEVICE RESET
The reset input RST is an active-low input. When taken
low, RST clears any transaction to or from the MPR081 on
the serial interface and configures the internal registers to the
same state as a power-up reset (Table 9). The MPR081 then
waits for a START condition on the serial interface.
CONTROLLING AND READING THE MPR081
REGISTER ORGANIZATION
The MPR081 is a peripheral that is controlled and
monitored though a small array of internal registers which are
accessed through the I2C bus.
INITIAL POWER-UP
On power-up, the interrupt output IRQ is reset, and IRQ
will go high. The registers are reset to the values shown in
STANDBY MODE
When the serial interface is idle, the MPR081
automatically enters standby mode. If any of the features are
used, the operating current rises because the internal timing
oscillator is running and toggling counters.
Figure 12. Master Tick Counter and
Pad/Key Input Sampling with Autorepeat
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