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參數(shù)資料
| 型號(hào)： | MPM21CUA650B |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 650 MHz, MICROPROCESSOR, XMA |
| 封裝： | MMC-2 |
| 文件頁數(shù)： | 13/64頁 |
| 文件大小： | 826K |
| 代理商： | MPM21CUA650B |
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Celeron
Processor Mobile Module MMC-2
at 700 MHz, 650 MHz, 600 MHz, 550 MHz, 500 MHz, and 450 MHz
14
Datasheet
243357-005
3.1.9
ITP and JTAG Pins
Table 9 provides descriptions of the ITP and JTAG signals, which the system manufacturer can use
to implement a JTAG chain and an ITP port if desired.
NOTE: FS_RESET# and FS_PRDY# are pulled up to VTT inside the mobile processor core.
3.1.10
Miscellaneous Pins
Table 10 provides descriptions of the miscellaneous signal pins.
Table 9.
ITP and JTAG Pins
Name
Type
Voltage
Description
TDO
O
V_CPUPU
JTAG Test Data Out: Serial output port. TAP instructions and data
are shifted out of the processor from this port.
TDI
I
VTT
JTAG Test Data In: Serial input port. TAP instructions and data are
shifted into the processor from this port.
TMS
I
VTT
JTAG Test Mode Select: Controls the TAP controller change
sequence.
TCLK
I
VTT
JTAG Test Clock: Testability clock for clocking the JTAG boundary
scan sequence.
TRST#
I
VTT
JTAG Test Reset: Asynchronously resets the TAP controller in the
processor.
FS_PREQ#
Debug Mode Request: Driven by the ITP – makes request to enter
debug mode.
FS_PRDY#
O
VTT
Debug Mode Ready: Driven by the processor – informs the ITP that
the processor is in debug mode.
FS_RESET#
O
VTT
Processor Reset: Processor reset status to the ITP.
VTT
O
VTT
GTL+ Termination Voltage: Used by the POWERON pin on the ITP
debug port to determine when target system is on. POWERON pin is
pulled up using a 1-K
resistor to VTT. Other ITP signals might use
this power rail for pullup.
Table 10. Miscellaneous Pins
Name
Type
Number
Description
Module ID[3:0]
O
CMOS
4
Module Revision ID: These pins track the revision level of the mobile
module. A 100-K pullup resistor to V_3S must be placed on the system
electronics for these signals. See Section 8.0 for more detail.
Ground
I
45
Ground
Reserved
RSVD
33
Unallocated Reserved pins.
All Reserved pins must not be connected.
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