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參數(shù)資料
| 型號： | MPC92433FA |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 1428 MHz, OTHER CLOCK GENERATOR, PQFP48 |
| 封裝： | LQFP-48 |
| 文件頁數(shù)： | 19/20頁 |
| 文件大?。?/td> | 820K |
| 代理商： | MPC92433FA |
IDT / ICS DUAL LVPECL CLOCK SYNTHESIZER
8
MPC92433 REV. 3 NOVEMBER 10, 2008
MPC92433
1428MHZ DUAL OUTPUT LVPECL CLOCK SYNTHESIZER
Output Frequency Configuration
The MPC92433 is a programmable frequency source
(synthesizer) and supports an output frequency range of 42.5 –
1428 MHz. The output frequency fOUT is a function of the
reference frequency fREF and the three internal PLL dividers P, M,
and N. fOUT can be represented by this formula:
fOUT = (fREF ÷ P) M ÷ (NA, B)
(1)
The M, N and P dividers require a configuration by the user
to achieve the desired output frequency. The output divider,
7). The PLL feedback-divider M is the frequency multiplication
factor and the main variable for frequency synthesis. For a given
reference frequency fREF, the PLL feedback-divider M must be
configured to match the specified VCO frequency range in order
to achieve a valid PLL configuration:
fVCO = (fREF ÷ P) M and
(2)
1360
≤ fVCO ≤ 2856
(3)
The output frequency may be changed at any time by changing
the value of the PLL feedback divider M. The smallest possible
output frequency change is the synthesizer granularity G
(difference in fOUT when incrementing or decrementing M). At a
given reference frequency, G is a function of the PLL pre-divider
P and post-divider N:
G = fREF ÷ (P NA,B)
(4)
The NB divider configuration determines if the output QB
generates a 1:1 or 2:1 frequency copy of the QA output signal. The
purpose of the PLL pre-divider P is to situated the PLL into the
specified VCO frequency range fVCO (in combination with M). For
a given output frequency, P = 4 results in a smaller output
frequency granularity G, P = 2 results a larger output frequency
granularity G and also increases the PLL bandwidth compared to
the P = 2 setting.
The following example illustrates the output frequency range of
the MPC92433 using a 16-MHz reference frequency.
Example Output Frequency Configuration
If a reference frequency of 16 MHz is available, an output
frequency at QA of 250 MHz and a small frequency granularity is
desired, the following steps would be taken to identify the
appropriate P, M, and N configuration:
1.
desired output frequency or frequency range. According to
Table 7, a target output frequency of 250 MHz falls in the
fOUT range of 170 to 357 MHz and requires to set NA = 8
2.
Calculate the VCO frequency fVCO = fOUT NA, which is
2000 MHz in this example.
3.
Determine the PLL feedback divider: M = fVCO ÷P.
The smallest possible output granularity in this example
calculation is 500 kHz (set P = 4). M calculates to a value of
2000 ÷ 4 = 500.
4.
Configure the MPC92433 with the obtained settings:
M[9:0] = 0111110100b (binary number for M=500)
NA[2:0] = 010
(÷8 divider, see Table 9)
P = 1
(÷4 divider, see Table 8)
NB = 0
(fOUT, QB = fOUT, QA)
5.
Use either parallel or serial interface to apply the setting. The
I2C configuration bytes for this example are:
PLL_H=01010010b and PLL_L=11110100b.
Table 7. Frequency Ranges (fREF=16 MHz)
fOUT (QA) [MHz]
NA
MP
G [MHz]
680–1428
NA=2
170-357
2
4
340-714
4
2
340–714
NA=4
170-357
2
340-714
4
1
226.67–476
NA=6
170-357
2
1.33
340-714
4
0.66
170–357
NA=8
170-357
2
1
340-714
4
0.5
113.33–238
NA=12
170-357
2
0.66
340-714
4
0.33
85–178.5
NA=16
170-357
2
0.5
340-714
4
0.25
42.5–89.25
NA=32
170-357
2
0.25
340-714
4
0.125
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| MPC92439ACR2 | 功能描述:IC SYNTHESIZER LVPECL 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| MPC92439EI | 功能描述:時鐘合成器/抖動清除器 FSL 900MHz LVPECL Freq. Synthesizer RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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