參數(shù)資料
型號(hào): MPC8536EBVTANGA
廠商: Freescale Semiconductor
文件頁數(shù): 74/126頁
文件大?。?/td> 0K
描述: MPU PWRQUICC III 800MHZ 783PBGA
產(chǎn)品培訓(xùn)模塊: MPC8536E QUICC III Processor
標(biāo)準(zhǔn)包裝: 1
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 800MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
其它名稱: MPC8536EBVTANG
MPC8536EBVTANG-ND
Electrical Characteristics
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
51
A timing diagram for TBI receive appears in the following figure.
.
Figure 24. TBI Single-Clock Mode Receive AC Timing Diagram
2.9.2.6
RGMII and RTBI AC Timing Specifications
This table presents the RGMII and RTBI AC timing specifications.
Table 35. RGMII and RTBI AC Timing Specifications
At recommended operating conditions with L/TVDD of 2.5 V ± 5%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
Data to clock output skew (at transmitter)
tSKRGT_TX
–500
0
500
ps
Data to clock input skew (at receiver) 2
tSKRGT_RX
1.0
2.8
ns
Clock period duration 3
tRGT
7.2
8.0
8.8
ns
Duty cycle for 1000BASE-T4
tRGTH/tRGT
45
55
%
Duty cycle for 10BASE-T and 100BASE-TX 3, 4
tRGTH/tRGT
40
50
60
%
Rise time (20%–80%)
tRGTR
0.75
ns
Fall time (20%–80%)
tRGTF
0.75
ns
Notes:
1. Note that, in general, the clock reference symbol representation for this section is based on the symbols RGT to
represent RGMII and RTBI timing. For example, the subscript of tRGT represents the TBI (T) receive (RX) clock. Note
also that the notation for rise (R) and fall (F) times follows the clock symbol that is being represented. For symbols
representing skews, the subscript is skew (SK) followed by the clock that is being skewed (RGT).
2. This implies that PC board design will require clocks to be routed such that an additional trace delay of greater than
1.5 ns will be added to the associated clock signal.
3. For 10 and 100 Mbps, tRGT scales to 400 ns ± 40 ns and 40 ns ± 4 ns, respectively.
4. Duty cycle may be stretched/shrunk during speed changes or while transition to a received packet's clock domains as
long as the minimum duty cycle is not violated and stretching occurs for no more than three tRGT of the lowest speed
transitioned between.
tTRR
tTRRH
tTRRF
tTRRR
RX_CLK
RCG[9:0]
valid data
tTRRDX
tTRRDV
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MPC8536EBVTATHA 功能描述:微處理器 - MPU 8536 Encrypted RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
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