參數(shù)資料
型號： MPC8536E-ANDROID
廠商： Freescale Semiconductor
文件頁數(shù)： 88/126頁
文件大小： 0K
描述： HARDWARE/SOFTWARE ANDROID OS
標(biāo)準(zhǔn)包裝： 1
系列： PowerQUICC ™
類型： MPU
適用于相關(guān)產(chǎn)品： MPC8536
所含物品： 板
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Electrical Characteristics
Freescale Semiconductor
64
2.11.1
USB DC Electrical Characteristics
This table provides the DC electrical characteristics for the USB interface.
2.11.2
USB AC Electrical Specifications
This table describes the general timing parameters of the USB interface of the chip.
Table 46. USB DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
Input current
IIN
—±5
μA
High-level output voltage,
IOH = –100 μA
VOH
OVDD – 0.2
—
V
Low-level output voltage,
IOL = 100 μA
VOL
—0.2
V
Note:
1. The symbol VIN, in this case, represents the OVIN symbol referenced in Table 1 and Table 2.
Table 47. USB General Timing Parameters6
Parameter
Symbol 1
Min
Max
Unit
Notes
usb clock cycle time
tUSCK
15
—
ns
2-5
Input setup to usb clock - all inputs
tUSIVKH
4
—
ns
2-5
input hold to usb clock - all inputs
tUSIXKH
1
—
ns
2-5
usb clock to output valid - all outputs
tUSKHOV
—
7
ns
2-5
Output hold from usb clock - all outputs
tUSKHOX
2
—
ns
2-5
Notes:
1. The symbols for timing specifications follow the pattern of t(First two letters of functional block)(signal)(state) (reference)(state) for inputs
and t(First two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tUSIXKH symbolizes usb timing (US) for
the input (I) to go invalid (X) with respect to the time the usb clock reference (K) goes high (H). Also, tUSKHOX symbolizes USB
timing (US) for the USB clock reference (K) to go high (H), with respect to the output (O) going invalid (X) or output hold time.
2. All timings are in reference to USB clock.
3. All signals are measured from OVDD/2 of the rising edge of the USB clock to 0.4 × OVDD of the signal in question for 3.3 V
signaling levels.
4. Input timings are measured at the pin.
5. For active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered through the
component pin is less than or equal to that of the leakage current specification.
6. When switching the data pins from outputs to inputs using the USBn_DIR pin, the output timings will be violated on that cycle
because the output buffers are tristated asynchronously. This should not be a problem, because the PHY should not be
functionally looking at these signals on that cycle as per ULPI specifications
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