參數(shù)資料
型號(hào): MPC8533EVTAQFB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 1000 MHz, RISC PROCESSOR, PBGA783
封裝: 29 X 29 MM, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-783
文件頁數(shù): 48/116頁
文件大?。?/td> 1277K
代理商: MPC8533EVTAQFB
MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
37
Enhanced Three-Speed Ethernet (eTSEC), MII Management
Figure 20 provides the AC test load for eTSEC.
Figure 20. eTSEC AC Test Load
Figure 21 shows the RMII receive AC timing diagram.
Figure 21. RMII Receive AC Timing Diagram
REF_CLK peak-to-peak jitter
tRMRJ
——
250
ps
Rise time REF_CLK (20%–80%)
tRMRR
1.0
2.0
ns
Fall time REF_CLK (80%–20%)
tRMRF
1.0
2.0
ns
RXD[1:0], CRS_DV, RX_ER setup time to
REF_CLK rising edge
tRMRDV
4.0
ns
RXD[1:0], CRS_DV, RX_ER hold time to REF_CLK
rising edge
tRMRDX
2.0
ns
Note:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMRDVKH symbolizes MII receive
timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the tMRX clock reference (K)
going to the high (H) state or setup time. Also, tMRDXKL symbolizes MII receive timing (GR) with respect to the time data input
signals (D) went invalid (X) relative to the tMRX clock reference (K) going to the low (L) state or hold time. Note that, in general,
the clock reference symbol representation is based on three letters representing the clock of a particular functional. For
example, the subscript of tMRX represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used
with the appropriate letter: R (rise) or F (fall).
Table 34. RMII Receive AC Timing Specifications (continued)
At recommended operating conditions with L/TVDD of 3.3 V ± 5%.or 2.5 V ± 5%.
Parameter/Condition
Symbol1
Min
Typ
Max
Unit
Notes
Output
Z0 = 50 Ω
LVDD/2
RL = 50 Ω
REF_CLK
RXD[1:0]
tRMRDX
tRMR
tRMRH
tRMRR
tRMRF
CRS_DV
RX_ER
tRMRDV
Valid Data
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