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參數(shù)資料
| 型號(hào)： | MPC8360EVVAJDGA |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC II PRO 740TBGA |
| 標(biāo)準(zhǔn)包裝： | 21 |
| 系列： | MPC83xx |
| 處理器類型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 533MHz |
| 電壓： | 1.2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 740-LBGA |
| 供應(yīng)商設(shè)備封裝： | 740-TBGA（37.5x37.5） |
| 包裝： | 托盤 |
| 配用： | MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC |
MPC8360E PowerQUICC II Pro Processor Product Brief, Rev. 0
4
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
Application Examples
side of the figure, subscribers are connected to the DSLAM line-card via the DSL PHYs and the integrated
UTOPIA interface on the MPC8360E.
In this type of application, the MPC8360E makes use of its internal interworking features to offload the
e300 CPU. Here, ATM-ATM interworking would be used to transfer data from the ATM based DSL
subscriber inputs, through the cores within the QUICC Engine and out through the other ATM UTOPIA
on the uplink port. In the event that the uplink switch fabric is Ethernet-based then ATM-Ethernet
interworking would also be provided by the MPC8360E QUICC Engine. Subscribers could also connect
directly to the DSLAM line-card using E1/T1 lines. In this scenario, the built-in IMA microcode could be
used to bundle multiple E1/T1 lines together into a higher bit stream ATM connection for the uplink.
2.2
Node B Network Interface Card
Figure 3 illustrates how easily a typical Node B network interface card application can be created with the
MPC8360E.
Figure 3. Node B Network Interface Card Using the MPC8360E
In this application, the MPC8360E provides all of the processing, protocol, and interworking functions
required to implement the Node B network interface card. The QUICC Engine is used to carry voice, data,
and video using ATM or IP over eight T1/E1 TDM links bundled with IMA or MLPPP-terminated
protocols between the Node Bs and the RNC. In addition, one of the UCCs in the QUICC Engine could
be used to support either a gigabit Ethernet (GMII) or ATM (UTOPIA 8/16-bit) interface to a backplane
in the Node B. Another UCC could be used to implement an STM-1 / OC-3 (AAL5 and AAL2) link to the
network (RNC). The unused UCCs can be configured as serial (UART) or Ethernet (MII) for debug and
control.
MPC8360E
ATM<–>ATM Interworking
ATM<–>Ethernet Interworking
PPP< >ATM
PPP< >Ethernet
Interworking
Local Bus
Controller
QUICC Engine
DDR
Controller
10/100 Base T
Ethernet
Octal T1/E1/J1
Framer / LIU
ATM / POS
PHY
STM-1
Link
Ethernet
e300
CPU
Complex
PCI
Bridge
32-bit DDR
SDRAM
32-bit DDR
SDRAM
QE Data
CPU
Code/Data
32-bit
PCI Bus
MPC8548
(Optional)
FLASH
Ethernet GMII / RMII
ATM 8/16-bit UTOPIA L2
Either / or
CPU
Debug Port
MSC8122/6
(Optional)
Serial / Ethernet
Console
Local Bus
Ethernet
JTAG
Network
Backplane
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8360EVVAJDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360EVVAJFGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360EVVAJFHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360EVVALDGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360EVVALDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
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