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| 型號： | MPC8360E-MDS-PBE |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD PROCESSOR FOR MPC8360E |
| 標(biāo)準(zhǔn)包裝： | 1 |
MPC8360E PowerQUICC II Pro Processor Product Brief, Rev. 0
Freescale Semiconductor
11
Preliminary—Subject to Change Without Notice
Document Revision History
The QUICC Engine will also be supported by a complete set of configurable device API drivers and
initialization software. Figure 5 shows the wealth of communication protocols supported by the QUICC
Engine with the e300 core.
Figure 5. Software Protocol Support for the QUICC Engine
5
Document Revision History
Table 1 provides a revision history for this product brief.
Table 1. Document Revision History
Rev. No.
Substantive Change(s)
0
Initial release.
Freescale Example
Applications
Customer Application
3rd Party Stacks & Protocols
SSL
IGMP
RIP
ARP
OSPF
SNMP
ICMP
BGP
IP-Sec
QUICC Engine PROTOCOL DRIVER API
Multi-Protocol Encapsulation
IP Forwarding, Routing, Management, Classification,
Header Compression, Checksum
MPLS
QoS
Eth over ATM, IPoATM, IPoPPP, IPoEthernet
TCP/IP v4/v6
Flow Control
CESoE
RPR-802.17
WiMax-802.16
Bridging & Reconfiguration
SNAP/LLC
Statistics
PPP
ML-PPP
PPPoE
VLAN, Switching, Tagging,
Aggregation
AAL0
AAL5
AAL2
AAL1/CES
L2TP
PPPoATM
Transparent
ISDN
802.3 Ad Link
Aggregation
Switching & OAM
SATM-TC
IMA
L2TPoATM
3GPPTS
PPPMux
MC-PPP
SS7
ATM
10/100/1000 Base T
HDLC
UTOPIA I / II + Ext MPHY
MII/RMII/GMII/RGMII/TBI/RTBI
TDM
POS
Higher Layer
Functions
QUICC
Engine API
Layer
2 / 3
Physical Layer
Interfaces
Layer 2
C
O
NF
IG
URA
T
IO
N
DRI
V
E
RS
O
AM
&
P
E
RF
O
RM
A
NCE
M
O
N
IT
O
RI
N
G
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