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參數(shù)資料
| 型號： | MPC8360E-MDS-PBE |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD PROCESSOR FOR MPC8360E |
| 標準包裝： | 1 |
MPC8360E PowerQUICC II Pro Processor Product Brief, Rev. 0
8
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
Architecture Overview
Eight universal communication controllers (UCCs) supporting the following protocols and
interfaces (not all of them simultaneously):
— 10/100 Mbps Ethernet/IEEE 802.3
— 1000 Mbps Ethernet/IEEE 802.3
— IP support for IPv4 and IPv6 packets including TOS, TTL and header checksum processing
— L2 Ethernet switching using MAC address or IEEE 802.1 P/Q VLAN tags
— PPP, Multi-Link (ML-PPP), Multi-Class (MC-PPP), and PPP mux support
— ATM protocol through UTOPIA interface
— HDLC /transparent up to 70-Mbps full-duplex
— HDLC BUS up to 10 Mbps
— Asynchronous HDLC
— UART
— BISYNC up to 2 Mbps
— QUICC Multichannel Controller (QMC) for 128 TDM channels
One multichannel communication controller (MCC) supporting the following:
— 256 HDLC or transparent channels
— 128 SS#7 channels
Two UTOPIA/POS interfaces supporting 124 multiphys each (optional 2
×128 multiphys with
extended address)
Two serial peripheral interfaces (SPI). SPI2 is dedicated to Ethernet PHY management.
8 TDM interfaces
Sixteen independent baud rate generators and 30 input clock pins for supplying clocks to UCC and
MCC serial channels
Four independent 16-bit timers that can be interconnected as two 32-bit timers
Interworking functionality:
— L2 10/100-Base T Ethernet switch
— ATM-to-ATM switching (AAL0, 2, 5)
— Ethernet-to-ATM switching with L3/L4 support
The QUICC Engine has a high level of compatibility with the peripherals in the MPC8260. It contains:
Eight universal communication controllers (UCC)
Two UTOPIA-packet over SONET (POS) controllers (UPC)
Two serial peripheral controllers (SPI)
One multi-channel controller (MCC)
One universal serial bus (USB)
The UCCs are similar to the PowerQUICC II peripherals: SCC (BISYNC, UART, and HDLC bus), and
FCC (fast Ethernet, HDLC, transparent, and ATM). In addition, 2
×124 UTOPIA PHYs are supported in
ATM mode. The QUICC Engine presents enhanced flexibility by allowing the user to configure the UCCs
to support a Layer-2 Ethernet switch.
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