參數(shù)資料
型號: MPC603RVG200LC
廠商: Freescale Semiconductor
文件頁數(shù): 28/31頁
文件大小: 0K
描述: MPU RISC PID7V-603E 255FCCBGA
標(biāo)準(zhǔn)包裝: 60
系列: MPC6xx
處理器類型: 32-位 MPC603e PowerPC
速度: 200MHz
電壓: 2.5V
安裝類型: 表面貼裝
封裝/外殼: 255-BCBGA 裸露焊盤,255-FCCBGA
供應(yīng)商設(shè)備封裝: 255-FCCBGA(21x21)
包裝: 托盤
PID7t-603e Hardware Specifications, Rev. 5
6
Freescale Semiconductor
Electrical and Thermal Characteristics
This table provides the DC electrical characteristics for the PID7t-603e.
This table provides the power consumption for the PID7t-603e.
Table 5. DC Electrical Specifications
Vdd = AVdd = 2.5 ± 5% V dc, OVdd = 3.3 ± 5% V dc, GND = 0 V dc, 0 Tj 105 °C
Characteristic
Symbol
Min
Max
Unit
Note
Input high voltage (all inputs except SYSCLK)
VIH
2.0
5.5
V
Input low voltage (all inputs except SYSCLK)
VIL
GND
0.8
V
SYSCLK input high voltage
CVIH
2.4
5.5
V
SYSCLK input low voltage
CVIL
GND
0.4
V
Input leakage current, Vin = 3.465 V
Iin
—30
A
1, 2
Vin = 5.5 V
Iin
300
A
1, 2
Hi-Z (off-state) leakage current, Vin = 3.465 V
ITSI
—30
A
1, 2
Vin = 5.5 V
ITSI
300
A
1, 2
Output high voltage, IOH = –7 mA
VOH
2.4
V
Output low voltage, IOL = 7 mA
VOL
—0.4
V
Capacitance, Vin = 0 V, f = 1 MHz (excludes TS, ABB, DBB, and ARTRY)Cin
—10.0
pF
3
Capacitance, Vin = 0 V, f = 1 MHz (for TS, ABB, DBB, and ARTRY)Cin
—15.0
pF
3
Notes:
1. Excludes test signals (LSSD_MODE, L1_TSTCLK, L2_TSTCLK, and JTAG signals).
2. The leakage is measured for nominal OVdd and Vdd or both OVdd and Vdd must vary in the same direction (for example, both
OVdd and Vdd vary by either +5% or -5%).
3. Capacitance is periodically sampled rather than 100% tested.
Table 6. Power Consumption
Processor (CPU) Frequency
Unit
100 MHz
133 MHz
166 MHz
200 MHz
233 MHz
266 MHz
300 MHz
Full-On Mode (DPM Enabled)
Typical
1.1
1.6
2.1
2.5
3.0
3.5
4.0
W
Maximum
1.6
2.4
3.2
4.0
4.6
5.3
6.0
W
Doze Mode
Typical
0.55
0.7
0.9
1.1
1.3
1.5
1.8
W
Nap Mode
Typical
50
60
75
85
100
120
130
mW
Sleep Mode
Typical
45
50
55
65
75
90
100
mW
Sleep Mode—PLL Disabled
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