參數(shù)資料
型號(hào)： MPC5602SEMLQ
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, LQFP-144
文件頁數(shù)： 36/104頁
文件大?。?/td> 1729K
代理商： MPC5602SEMLQ
Pinout and Signal Descriptions
MPC560xS Microcontroller Data Sheet, Rev. 2
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
37
TCK
JTAG
Debug port serial clock as per JTAG specifications
TDI
JTAG
Debug port serial data input port as per JTAG standards
specifications
TDO
JTAG
Debug port serial data output port as per JTAG standards
specifications
TMS
JTAG
Debug port Test Mode Select signal for the JTAG TAP controller state
machine and indicates various state transitions for the TAP controller
in the device
BP[0:3]
LCD
Backplane signals from the LCD controlling the backplane reference
voltage for the LCD display
FP[0:39]
LCD
Frontplane signals for LCD segments
EVTI
Nexus
Nexus2+ event input trigger
EVTO
Nexus
Nexus2+ event output trigger
MCKO
Nexus
Output clock for the development tool
MDO[0:3]
Nexus
Message output port pins that send information bits to the
development tools for messages such as Branch Trace Message
(BTM), Ownership Trace Message (OTM), Data Trace Message
(DTM). Only available in reduced port mode.
MSEO
Nexus
Output pin—Indicates the start or end of the variable length message
on the MDO pins
PDI[0:17]
Parallel Data Interface Video/graphic data in various RGB modes input to the DCU
PDI_DE
Parallel Data Interface Input signal indicates the validity of pixel data on the Input PDI data
bus. For valid Pixel Data this is high, otherwise low.
PDI_HSYNC
Parallel Data Interface Input indicates the timing reference for the start of each frame line for
the PDI Input data.
PDI_PCLK
Parallel Data Interface Output pixel clock for PDI
PDI_VSYNC
Parallel Data Interface Input indicates the timing reference for the start of a frame for the PDI
input data.
RXD_A
LINFlex-UART
SCI/LIN Receive data signal—This port is used to download the code
for the BAM boot sequence.
RXD_B
LINFlex-UART
SCI/LIN Receive data signal. Input pad for the LIN SCI module.
Connects to the internal LIN second port.
TXD_A
LINFlex-UART
This port is used to download the code for the BAM boot sequence.
TXD_B
LINFlex-UART
SCI/LIN Transmit data signal—Transmit (output) port for the second
LIN module in the chip
Table 7. Signal details (continued)
Signal
Peripheral
Description
相關(guān)PDF資料
PDF描述
MPC5606SEMLU 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP176
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MPC5602SEMLQR 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP144
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