
MP1570 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
MP1570 Rev. 1.5
1/31/2006
www.MonolithicPower.com
7
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2006 MPS. All Rights Reserved.
TM
The input capacitor can be electrolytic, tantalum
or ceramic. When using electrolytic or tantalum
capacitors, a small, high quality ceramic
capacitor, i.e. 0.1μF, should be placed as close
to the IC as possible. When using ceramic
capacitors, make sure that they have enough
capacitance to provide sufficient charge to
prevent excessive voltage ripple at input. The
input voltage ripple caused by capacitance can
be estimated by:
×
×
×
=
IN
OUT
V
IN
OUT
V
S
LOAD
IN
V
1
V
1
C
f
I
V
Output Capacitor
The output capacitor is required to maintain the
DC output voltage. Ceramic, tantalum, or low
ESR electrolytic capacitors are recommended.
Low ESR capacitors are preferred to keep the
output voltage ripple low. The output voltage
ripple can be estimated by:
×
×
+
×
×
×
=
2
C
f
8
1
R
V
V
1
L
f
V
V
S
ESR
IN
OUT
S
OUT
OUT
Where C2 is the output capacitance value and
R
ESR
is the equivalent series resistance (ESR)
value of the output capacitor.
In the case of ceramic capacitors, the
impedance at the switching frequency is
dominated by the capacitance. The output
voltage ripple is mainly caused by the
capacitance. For simplification, the output
voltage ripple can be estimated by:
×
×
×
×
=
IN
OUT
V
2
S
OUT
V
OUT
V
1
2
C
L
f
8
V
In the case of tantalum or electrolytic
capacitors, the ESR dominates the impedance
at the switching frequency. For simplification,
the output ripple can be approximated to:
ESR
IN
OUT
V
S
OUT
V
×
OUT
R
V
1
L
f
V
×
×
=
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP1570 can be optimized for a wide range of
capacitance and ESR values.
Compensation Components
MP1570 employs current mode control for easy
compensation and fast transient response. The
system stability and transient response are
controlled through the COMP pin. COMP pin is
the output of the internal transconductance
error amplifier. A series capacitor-resistor
combination sets a pole-zero combination to
control the characteristics of the control system.
The DC gain of the voltage feedback loop is
given by:
OUT
V
FB
VEA
CS
LOAD
VDC
V
A
G
R
A
×
×
×
=
Where A
VEA
is the error amplifier voltage gain,
400V/V;
G
CS
is
transconductance, 5.4A/V; R
LOAD
is the load
resistor value.
the
current
sense
The system has 2 poles of importance. One is
due to the compensation capacitor (C3) and the
output resistor of error amplifier, and the other
is due to the output capacitor and the load
resistor. These poles are located at:
VEA
EA
3
1
P
A
C
2
G
f
×
×
π
=
LOAD
error
2
P
R
2
C
the
2
1
×
f
×
π
=
Where,
transconductance, 800μA/V.
G
EA
is
amplifier
The system has one zero of importance, due to the
compensation
capacitor
compensation resistor (R3). This zero is located at:
(C3)
and
the
3
R
3
C
2
1
f
1
Z
×
×
π
=