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參數(shù)資料
| 型號(hào)： | MP1570DN |
| 廠商： | MONOLITHIC POWER SYSTEMS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 3A, 23V, 340KHz Synchronous Rectified Step-Down Converter |
| 中文描述： | 3 A SWITCHING REGULATOR, 380 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大小： | 333K |
| 代理商： | MP1570DN |
MP1570 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
MP1570 Rev. 1.5
1/31/2006
www.MonolithicPower.com
4
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
2006 MPS. All Rights Reserved.
TM
PIN FUNCTIONS
Pin #
Name Description
1
BS
High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel MOSFET
switch. Connect a 0.01μF or greater capacitor from SW to BS to power the high side switch.
Power Input. IN supplies the power to the IC, as well as the step-down converter switches.
Drive IN with a 4.75V to 23V power source. Bypass IN to GND with a suitably large capacitor
to eliminate noise on the input to the IC. See
Input Capacitor
.
Power Switching Output. SW is the switching node that supplies power to the output. Connect
the output LC filter from SW to the output load. Note that a capacitor is required from SW to
BS to power the high-side switch.
Ground (Connect Exposed Pad to Pin 4)
Feedback Input. FB senses the output voltage to regulate that voltage. Drive FB with a
resistive voltage divider from the output voltage. The feedback threshold is 1.230V. See
Setting the Output Voltage
.
Compensation Node. COMP is used to compensate the regulation control loop. Connect a
series RC network from COMP to GND to compensate the regulation control loop. In some
cases, an additional capacitor from COMP to GND is required. See
Compensation
Components.
Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on
the regulator, drive it low to turn it off. Pull up with 100k
resistor for automatic startup.
Soft-start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND
to set the soft-start period. A 0.1μF capacitor sets the soft-start period to 20ms. To disable the
soft-start feature, leave SS unconnected.
2
IN
3
SW
4
GND
5
FB
6
COMP
7
EN
8
SS
BLOCK DIAGRAM
MP1570_BD01
LOCKOUT
COMPARATOR
INTERNAL
REGULATORS
IN
EN
+
ERROR
AMPLIFIER
1.2V
OVP
RAMP
CLK
1.23V
0.3V
CURRENT
COMPARATOR
CURRENT
SENSE
AMPLIFIER
1.5V
SHUTDOWN
COMPARATOR
7
COMP
6
SS
8
FB
5
GND
4
OSCILLATOR
100/340KHz
S
R
Q
SW
3
BS
1
IN
5V
2
OVP
IN < 4.05V
EN OK
+
Q
LATCH
+
+
1.5V
+
+
2.5V
+
+
Figure 1—Functional Block Diagram
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