OPERATIONAL MODES up sources can be select" />
參數(shù)資料
型號(hào): MM908E621ACDWB
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 18/60頁(yè)
文件大?。?/td> 0K
描述: IC QUAD HALF BRDG TRPL SW 54SOIC
標(biāo)準(zhǔn)包裝: 26
應(yīng)用: 自動(dòng)鏡像控制
核心處理器: HC08
程序存儲(chǔ)器類型: 閃存(16 kB)
控制器系列: 908E
RAM 容量: 512 x 8
接口: SCI,SPI
輸入/輸出數(shù): 12
電源電壓: 9 V ~ 16 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 54-BSSOP(0.295",7.50mm 寬)裸露焊盤(pán)
包裝: 管件
供應(yīng)商設(shè)備封裝: 54-SOICW-EP
Analog Integrated Circuit Device Data
Freescale Semiconductor
25
908E621
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
up sources can be selected (maskable), which is not possible
in Sleep mode.
Figure 12 show the procedure to enter the Stop mode and
how the system is waking up.
Figure 12. STOP Mode Wake-up Procedure
Sleep Mode
In Sleep mode, the voltage regulator is turned off and the
MCU is not supplied (VDD = 0 V), also the RST_A pin is pulled
low.
To enter the Sleep mode, the Sleep bit in the System
Control Register has to be set.
Wake-up from this mode is possible by LIN bus activity or
the wake-up input L0, and is not maskable. The wake-up
behaves like a power on reset. The wake-up / reset source
can be evaluated by the L0WF and/or LINWF bits in the
Reset Status Register.
Sleep mode has a lower current consumption than Stop
mode, but requires a longer time to wake-up. The wake-up
sources can not be selected (not maskable).
Figure 13 show the procedure to enter the Sleep mode
and how a wake-up is performed.
Figure 13. SLEEP Mode Wake-up Procedure
Table 6 summarized the Operating modes.
From Reset
initialize
operate
SPI:
STOP =1
MCU STOP
IRQ
interrupt
?
SPI: reason for
interrupt
Switch to VREG
low current mode
Assert IRQ
Switch to VREG
high current mode
MCU
Power Die
Wake-up on
LIN or L0 ?
Enable/disable
LIN/L0 wakeup
From Reset
initialize
operate
SPI:
SLEEP =1
Switch off VREG
VDD low, RST low
Store Wake-up
Event
Start VREG
VDD high, RST
high
MCU
Power Die
Wake-up on
LIN or L0 ?
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