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參數(shù)資料
| 型號(hào)： | MM54C32N |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Quad 2-Input OR Gate |
| 中文描述： | CMOS SERIES, QUAD 2-INPUT OR GATE, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 102K |
| 代理商： | MM54C32N |
AC Electrical Characteristics
*
T
A
e
25
§
C, C
L
e
50 pF, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
pd
Propagation Delay Time to
Logical ‘‘1’’ or ‘‘0’’
V
CC
e
5.0V
80
150
ns
V
CC
e
10V
35
70
ns
C
IN
Input Capacitance
Any Input (Note 2)
5
pF
C
PD
*
AC Parameters are guaranteed by DC correlated testing.
Power Dissipation Capacitance
Per Gate (Note 3)
15
pF
Note 2:
Capacitance is guaranteed by periodic testing.
Note 3:
C
PD
determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics Application
NoteDAN-90.
Physical Dimensions
inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C32J or MM74C32J
NS Package Number J14A
3
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