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參數(shù)資料
| 型號(hào)： | MM54C48 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | BCD-to-7 Segment Decoder |
| 中文描述： | BCD碼到7段解碼器 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 130K |
| 代理商： | MM54C48 |
TL/F/5883
M
March 1988
MM54C48/MM74C48
BCD-to-7 Segment Decoder
General Description
The MM54C48/MM74C48 BCD-to-7 segment decoder is a
monolithic complementary MOS (CMOS) integrated circuit
constructed with N- and P-channel enhancement transis-
tors. Seven NAND gates and one driver are connected in
pairs to make binary-coded decimal (BCD) data and its com-
plement available to the seven decoding AND-OR-INVERT
gates. The remaining NAND gate and three input buffers
provide test-blanking input/ripple-blanking output, and rip-
ple-blanking inputs.
Features
Y
Wide supply voltage range
3.0V to 15V
Y
Guaranteed noise margin
1.0V
Y
High noise immunity
0.45 V
CC
(typ.)
fan out of 2
driving 74L
Y
Low power
TTL compatibility
Y
High current sourcing output (up to 50 mA)
Y
Ripple blanking for leading or trailing zeros (optional)
Y
Lamp test provision
Connection Diagram
Dual-In-Line Package
TL/F/5883–1
Top View
Order Number MM54C48 or MM74C48
Segment Identification
TL/F/5883–2
Numerical Designations
and Resultant Displays
TL/F/5883–3
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MM54C48J | BCD-to-7 Segment Decoder |
| MM54C48N | BCD-to-7 Segment Decoder |
| MM74C48J | BCD-to-7 Segment Decoder |
| MM74C48N | BCD-to-7 Segment Decoder |
| MM54C74 | Dual D Flip-Flop |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM54C48 WAF | 制造商:Texas Instruments 功能描述: |
| MM54C48J | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:BCD-to-7 Segment Decoder |
| MM54C48N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:BCD-to-7 Segment Decoder |
| MM54C48W/883C | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MM54C74 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual D Flip-Flop |
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