參數(shù)資料
型號: ML2252
廠商: Fairchild Semiconductor Corporation
元件分類: 串行ADC
英文描述: μP Compatible 8-Bit A/D Converters with 2-Channel Multiplexer(具有雙通道多路轉(zhuǎn)換器的微處理器兼容的8位A/D轉(zhuǎn)換器)
中文描述: 微處理器兼容的8位A / D轉(zhuǎn)換器,帶有2通道多路復用器(具有雙通道多路轉(zhuǎn)換器的微處理器兼容的8位的A / D轉(zhuǎn)換器)
文件頁數(shù): 3/13頁
文件大小: 202K
代理商: ML2252
ML2252, ML2259
3
Pin Number
ML2252
ML2259
Name
Function
1
2
3
4
5
6
7
CH3
CH4
CH5
CH6
CH7
START
EOC
Analog input 3.
Analog input 4.
Analog input 5.
Analog input 6.
Analog input 7.
Start of conversion. Active high digital input pulse initiates conversion.
End of conversion. This output goes low after a START pulse occurs, stays
low for the entire A/D conversion, and goes high after conversion is
completed. Data on DB0–DB7 is valid on rising edge of EOC and stays valid
until next EOC rising edge.
Data output 3.
Output enable input. When OE = 0, DB0–DB7 are in high impedance state;
OE = 1, DB0–DB7 are active outputs.
Clock. Clock input provides timing for A/D converter, S/H, and digital
interface.
Positive supply. 5V ±10%.
Positive reference voltage.
Ground. 0V, all analog and digital inputs or outputs are referenced to this
point.
Data output 1.
Data output 2.
Negative reference voltage.
Data output 0.
Data output 4.
Data output 5.
Data output 6.
Data output 7.
Address latch enable. Input to latch in the digital address (ADDR2-0) on the
rising edge of the multiplexer.
Address input 2 to multiplexer. Digital input for selecting analog input.
Address input 1 to multiplexer. Digital input for selecting analog input.
Address input 0 to multiplexer. Digital input for selecting analog input.
Analog input 0.
Analog input 1.
Analog input 2.
2
3
4
5
8
9
DB3
OE
6
10
CLK
7
8
9
11
12
13
V
CC
+V
REF
GND
10
11
12
13
14
15
16
17
18
14
15
16
17
18
19
20
21
22
DB1
DB2
–V
REF
DB0
DB4
DB5
DB6
DB7
ALE
23
24
25
26
27
28
ADDR2
ADDR1
ADDR0
CH0
CH1
CH2
19
20
1
PIN DESCRIPTION
相關(guān)PDF資料
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ML2259 μP Compatible 8-Bit A/D Converters with 8-Channel Multiplexer(具有八通道多路轉(zhuǎn)換器的微處理器兼容的8位A/D轉(zhuǎn)換器)
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