參數(shù)資料
型號: MK1581-01GILF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 9/11頁
文件大?。?/td> 0K
描述: IC CLK GENERATOR T1/E1 16-TSSOP
標準包裝: 96
類型: 時鐘發(fā)生器
PLL:
輸入: 時鐘,晶體
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 2:1
差分 - 輸入:輸出: 無/無
頻率 - 最大: 2.048MHz
除法器/乘法器: 是/無
電源電壓: 3.15 V ~ 3.45 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 16-TSSOP
包裝: 管件
MK1581-01
LOW PHASE NOISE T1/E1 CLOCK GENERATOR
VCXO AND SYNTHESIZER
IDT LOW PHASE NOISE T1/E1 CLOCK GENERATOR
7
MK1581-01
REV F 051310
Recommended PCB Layout
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK1581-01. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Rating
Supply Voltage, VDD
7 V
All Inputs and Outputs
-0.5 V to VDD+0.5 V
Ambient Operating Temperature
-40 to +85
° C
Storage Temperature
-65 to +150
° C
Junction Temperature
125
° C
Soldering Temperature
260
° C
G
For m inim um output clock jitter,
rem ove ground and pow er plane
w ithin this entire area. A lso route
all other traces aw ay from this area.
= G round
C onnection
G
Legend:
F or m inim um output clock jitter,
device V D D connections should
be m ade to com m on bulk
decoupling device (see text).
1
2
3
4
5
6
7
8
12
11
10
9
16
15
14
13
G
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