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參數(shù)資料
| 型號： | MF6 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 6th Order Switched Capacitor Butterworth Lowpass |
| 中文描述： | 6階巴特沃斯低通開關(guān)電容 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大小： | 878K |
| 代理商： | MF6 |
Typical Performance Characteristics
(Continued)
Crosstalk Test Circuits
Pin Descriptions
(Pin Numbers)
Pin
FILTER OUT
(3)
Description
The output of the lowpass filter. It
will typically sink 0.9 mA and source
3 mA and swing to within 1V of each
supply rail.
The input to the lowpass filter. To
minimize gain errors the source
impedance that drives this input
should be less than 2k (see section
1.4). For single supply operation the
input signal must be biased to
mid-supply or AC coupled.
FILTER IN (8)
Pin
V
OS
ADJ (7)
Description
This pin is used to adjust the DC
offset of the filter output; if not used
it must be tied to the AGND
potential. (See section 1.3)
DC Gain Deviation
vs Power Supply Voltage
DS005065-64
DC Gain Deviation
vs Clock Frequency
DS005065-65
From Filter to Op Amps
DS005065-10
From Either Op Amp to Filter Output
DS005065-11
www.national.com
8
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