LOGIC COMMANDS AND REGISTERS ARCHIVE INFORMA" />
參數(shù)資料
型號(hào)： MCZ33993EWR2
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 7/28頁(yè)
文件大?。?/td> 0K
描述： IC MULTIPLE SWITCH DETECT 32SOIC
標(biāo)準(zhǔn)包裝： 1,000
系列： *
應(yīng)用： *
接口： *
電源電壓： *
封裝/外殼： 32-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 32-SOIC
包裝： 帶卷 (TR)
安裝類型： 表面貼裝
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
33993
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
ARCHIVE
INFORMATION
ARCHIVE
INFORMATION
Analog Select Register via software at any time in Normal
mode.
CALIBRATION OF TIMERS
In cases where an accurate time base is required, the user
may calibrate the internal timers using the calibration
command (refer to Table 12). After the 33993 device
receives the calibration command, the device expects 512
μs
logic [0] calibration pulse on the CS pin. The pulse is used to
calibrate the internal clock. No other SPI pins should
transition during this 512
μs calibration pulse. Because the
oscillator frequency changes with temperature, calibration is
required for an accurate time base. Calibrating the timers has
no affect on the quiescent current measurement. The
calibration command simply makes the time base more
accurate. The calibration command may be used to update
the device on a periodic basis.
RESET
The reset command resets all registers to Power-ON
Reset (POR) state. Refer to Table 14, page 16, for POR
states or the paragraph entitled Power-ON Reset (POR) on
page 12 of this datasheet.
Table 10. Analog Command
Analog Command
Not used
Current
Select
Analog Channel Select
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
X
16 mA 2.0 m
A
0
Table 11. Analog Channel
Bits 43210
Analog Channel
Select
Bits 43210
Analog Channel
Select
00000
No Input Selected
01100
SG11
00001
SG0
01101
SG12
00010
SG1
01110
SG13
00011
SG2
01111
SP0
00100
SG3
10000
SP1
00101
SG4
10001
SP2
00110
SG5
10010
SP3
00111
SG6
10011
SP4
01000
SG7
10100
SP5
01001
SG8
10101
SP6
01010
SG9
10110
SP7
01011
SG10
Table 12. Calibration Command
Calibration Command
Command Bits
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
1
X
Table 13. Reset Command
Reset Command
Command Bits
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
X
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