參數(shù)資料
型號(hào): MCZ33793EF
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 15/27頁(yè)
文件大?。?/td> 0K
描述: IC DSI SLAVE REMOTE SENS 16-SOIC
標(biāo)準(zhǔn)包裝: 48
類型: 傳感器接口
輸入類型: 邏輯
輸出類型: 邏輯
接口: 并聯(lián)
電流 - 電源: 250mA
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC N
包裝: 管件
產(chǎn)品目錄頁(yè)面: 808 (CN2011-ZH PDF)
Analog Integrated Circuit Device Data
22
Freescale Semiconductor
33793
TYPICAL APPLICATIONS
TYPICAL APPLICATIONS
COMMUNICATION FORMAT
DSI messages are composed of individual words separated
by a frame delay. Transfers are full duplex. Command
messages from the master occur at the same time as
responses from the slaves. Slave responses to commands
occur during the next command message. This allows slaves
time to decode the command, retrieve the information and
prepare to send it to the master. A bus traffic example is
shown in Figure 6.
The example shows three commands separated by the
minimum frame delay followed by a command after a longer
delay.
Figure 6. Bus Traffic Example
IO0
H_CAP
BUSOUT
BUSRTN
LOGOUT
REGOUT
IO1
IO2
IO3
BUSIN
Rectifiers
Bus Switch
0 – 35 V Bi-Directional
Forward Receiver
Reverse Receiver
Data
Frame
Received
Message
from MCU
Bandgap
Reference
Data
Frame
Bandgap
Reference
1.0
F
Typical
Response
Current
0 –11 mA
7.0 mA/
S
Oscillator
4.0 MHz
Logic
Command Decode
State Machine
Response Generation
I/O Buffers
DataOut <3:0>
DataOut <0>
DataOut <1>
DataOut <2>
DataOut <3>
I/O<3:0>
I/O0
I/O1
I/O2
I/O3
SEL
Logic Out
High Current
Buffer
Address A<3:0>
4 Bits NVM
Power
Management
5.0 V Regulator
BG Reference
Bias Currents
4:1
MUX
ADC
8 Bits
4
Supply Comparators
POR
Undervoltage
Detector
BG
GND
4.7
F
Bus Return
Master
Slave
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