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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | MCP601-E/P |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 32/34闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC OPAMP CMOS SGL 2.7V 8-DIP |
| 妯欐簴鍖呰锛� | 60 |
| 鏀惧ぇ鍣ㄩ鍨嬶細 | 閫氱敤 |
| 闆昏矾鏁�(sh霉)锛� | 1 |
| 杓稿嚭椤炲瀷锛� | 婊挎摵骞� |
| 杞夋彌閫熺巼锛� | 2.3 V/µs |
| 澧炵泭甯跺绌嶏細 | 2.8MHz |
| 闆绘祦 - 杓稿叆鍋忓锛� | 1pA |
| 闆诲 - 杓稿叆鍋忕Щ锛� | 700µV |
| 闆绘祦 - 闆绘簮锛� | 230µA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 22mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 2.7 V ~ 6 V |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 瀹夎椤炲瀷锛� | 閫氬瓟 |
| 灏佽/澶栨锛� | 8-DIP锛�0.300"锛�7.62mm锛� |
| 渚涙噳鍟嗚ō鍌欏皝瑁濓細 | 8-PDIP |
| 鍖呰锛� | 绠′欢 |
| 鐢㈠搧鐩寗闋侀潰锛� | 678 (CN2011-ZH PDF) |
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2007 Microchip Technology Inc.
DS21314G-page 7
MCP601/1R/2/3/4
Note: Unless otherwise indicated, T
A = +25掳C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT 鈮� VDD/2,
VL = VDD/2, RL = 100 k惟 to VL, CL = 50 pF and CS is tied low.
FIGURE 2-13:
Channel-to-Channel
Separation vs. Frequency.
FIGURE 2-14:
Input Bias Current, Input
Offset Current vs. Ambient Temperature.
FIGURE 2-15:
DC Open-Loop Gain vs.
Load Resistance.
FIGURE 2-16:
CMRR, PSRR vs.
Frequency.
FIGURE 2-17:
Input Bias Current, Input
Offset Current vs. Common Mode Input Voltage.
FIGURE 2-18:
DC Open-Loop Gain vs.
Supply Voltage.
90
100
110
120
130
140
150
1.E+03
1.E+04
1.E+05
1.E+06
Frequency (Hz)
Channel-
to-
C
hannel
S
e
paration
(
d
B)
No Load
Input Referred
1k
10k
100k
1M
1
10
100
1000
25 35 45 55 65 75 85 95 105 115 125
Ambient Temperature (掳C)
Input
Bias
and
Off
set
Currents
(pA)
IB
VDD = 5.5V
VCM = 4.3V
IOS
80
90
100
110
120
1.E+02
1.E+03
1.E+04
1.E+05
Load Resistance ()
D
C
Open-Loop
Gain
(
d
B
)
VDD = 2.7V
VDD = 5.5V
100
1k
10k
100k
10
20
30
40
50
60
70
80
90
100
1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06
Frequency (Hz)
CMRR,
PSRR
(
d
B)
CMRR
VDD = 5.0V
1100
10k
1M
PSRR+
PSRR鈥�
10
1k
100k
1
10
100
1000
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
Input
Bias
and
Off
set
Currents
(pA)
IB, +85掳C
VDD = 5.5V
max. VCMR 鈮� 4.3V
IB, +125掳C
IOS, +85掳C
IOS, +125掳C
80
90
100
110
120
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Power Supply Voltage (V)
DC
Open-Loop
Gain
(dB)
RL = 25 k
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鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁�(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| MCP601-ESL | 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V to 6.0V Single Supply CMOS Op Amps |
| MCP601-ESN | 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V to 6.0V Single Supply CMOS Op Amps |
| MCP601-EST | 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V to 6.0V Single Supply CMOS Op Amps |
| MCP601-I | 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V to 5.5V Single Supply CMOS Op Amps |
| MCP601-I/CH | 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V to 5.5V Single-Supply CMOS Op Amps |
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