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| 鍨嬭櫉锛� | MCP601-E/P |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 31/34闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC OPAMP CMOS SGL 2.7V 8-DIP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 60 |
| 鏀惧ぇ鍣ㄩ鍨嬶細 | 閫氱敤 |
| 闆昏矾鏁�(sh霉)锛� | 1 |
| 杓稿嚭椤炲瀷锛� | 婊挎摵骞� |
| 杞�(zhu菐n)鎻涢€熺巼锛� | 2.3 V/µs |
| 澧炵泭甯跺绌嶏細 | 2.8MHz |
| 闆绘祦 - 杓稿叆鍋忓锛� | 1pA |
| 闆诲 - 杓稿叆鍋忕Щ锛� | 700µV |
| 闆绘祦 - 闆绘簮锛� | 230µA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 22mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 2.7 V ~ 6 V |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 瀹夎椤炲瀷锛� | 閫氬瓟 |
| 灏佽/澶栨锛� | 8-DIP锛�0.300"锛�7.62mm锛� |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-PDIP |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 678 (CN2011-ZH PDF) |
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MCP601/1R/2/3/4
DS21314G-page 6
2007 Microchip Technology Inc.
Note: Unless otherwise indicated, T
A = +25掳C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT 鈮� VDD/2,
VL = VDD/2, RL = 100 k惟 to VL, CL = 50 pF and CS is tied low.
FIGURE 2-7:
Input Offset Voltage.
FIGURE 2-8:
Input Offset Voltage vs.
Temperature.
FIGURE 2-9:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 2.7V.
FIGURE 2-10:
Input Offset Voltage Drift.
FIGURE 2-11:
CMRR, PSRR vs.
Temperature.
FIGURE 2-12:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 5.5V.
0%
2%
4%
6%
8%
10%
12%
14%
16%
-2.0 -1.6 -1.2 -0.8 -0.4 0.0 0.4 0.8 1.2 1.6 2.0
Input Offset Voltage (mV)
P
e
rcentage
of
Occurrences
1200 Samples
-0.5
-0.4
-0.3
-0.2
-0.1
0.0
0.1
0.2
0.3
0.4
0.5
-50
-25
0
25
50
75
100
125
Ambient Temperature (掳C)
Input
Off
set
Voltag
e(
m
V)
VDD = 2.7V
VDD = 5.5V
-200
-100
0
100
200
300
400
500
600
700
800
-0
.4
-0
.2
0.
0
0.
2
0.
4
0.
6
0.
8
1.
0
1.
2
1.
4
1.
6
1.
8
2.
0
Common Mode Input Voltage (V)
Input
O
ffs
et
Vol
ta
g
e(
V)
VDD = 2.7V
TA = 鈥�40掳C
TA = +25掳C
TA = +85掳C
TA = +125掳C
0%
2%
4%
6%
8%
10%
12%
14%
16%
18%
-10 -8
-6
-4
-2
02468
10
Input Offset Voltage Drift (V/掳C)
Percent
age
of
Occurrences
1200 Samples
TA = 鈥�40 to +125掳C
75
80
85
90
95
100
-50
-25
0
25
50
75
100
125
Ambient Temperature (掳C)
CM
R
,PSRR
(
d
B)
PSRR
CMRR
-200
-100
0
100
200
300
400
500
600
700
800
-0
.5
0.
0
0.
5
1.
0
1.
5
2.
0
2.
5
3.
0
3.
5
4.
0
4.
5
5.
0
Common Mode Input Voltage (V)
Input
O
ffs
et
Vol
ta
g
e(
V)
VDD = 5.5V
TA = 鈥�40掳C
TA = +25掳C
TA = +85掳C
TA = +125掳C
鐩搁棞(gu膩n)PDF璩囨枡 |
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| MCP601-ESL | 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V to 6.0V Single Supply CMOS Op Amps |
| MCP601-ESN | 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V to 6.0V Single Supply CMOS Op Amps |
| MCP601-EST | 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V to 6.0V Single Supply CMOS Op Amps |
| MCP601-I | 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V to 5.5V Single Supply CMOS Op Amps |
| MCP601-I/CH | 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V to 5.5V Single-Supply CMOS Op Amps |
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