FIGURE 4-2: SINC Filter Response, MCP3550-50 Device. : FIGURE 4-" />
參數資料
型號: MCP355XDM-TAS
廠商: Microchip Technology
文件頁數: 9/36頁
文件大小: 0K
描述: BOARD DEMO TINY APP SNSR MCP355X
產品培訓模塊: MCP3901 Analog Front End
標準包裝: 1
ADC 的數量: 1
位數: 22
數據接口: 串行
輸入范圍: ±3 V
工作溫度: -40°C ~ 125°C
已用 IC / 零件: MCP355x
已供物品: 板,CD
產品目錄頁面: 672 (CN2011-ZH PDF)
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MCP3550T-60E/MS-ND - IC ADC 22BIT 2.7V 1CH 8MSOP
MCP3550T-50E/SN-ND - IC ADC 22BIT 2.7V 1CH 8SOIC
MCP3550T-50E/MS-ND - IC ADC 22BIT 2.7V 1CH 8MSOP
MCP3550-60E/SN-ND - IC ADC 22BIT 2.7V 1CH 8SOIC
MCP3550-60E/MS-ND - IC ADC 22BIT 2.7V 1CH 8MSOP
MCP3550-50E/SN-ND - IC ADC 22BIT 2.7V 1CH 8SOIC
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2009 Microchip Technology Inc.
DS21950E-page 17
MCP3550/1/3
:
FIGURE 4-2:
SINC Filter Response,
MCP3550-50 Device.
:
FIGURE 4-3:
SINC Filter Response,
MCP3550-60 Device.
:
FIGURE 4-4:
SINC Filter Response,
MCP3551 Device, Simultaneous 50/60 Hz
Rejection.
FIGURE 4-5:
SINC Filter Response at
Integer Multiples of the Sampling Frequency (fs).
4.3
Internal Oscillator
The MCP3550/1/3 devices include a highly stable and
accurate internal oscillator that provides clock signals
to the delta-sigma ADC with minimum jitter. The
oscillator is a specialized structure with a low
temperature coefficient across the full range of
specified operation. See Table 4-1 for oscillator
frequencies.
The conversion time is an integer multiple of the
internal clock period and, therefore, has the same
accuracy as the internal clock frequency. The internal
oscillator frequency is 102.4 kHz ±1% for the
MCP3550-50, 112.64 kHz ±1% for the MCP3551, and
122.88 kHz ±1% for the MCP3550-60 and MCP3553
devices, across the full power supply voltage and
specified temperature ranges.
The notch of the digital filter is proportional to the
internal oscillator frequency, with the exact notch
frequency equivalent to the oscillator accuracy
(< 1% deviation). This high accuracy, combined with
wide notches, will ensure that the MCP3551 will have
simultaneous 50 Hz and 60 Hz line frequency rejection
and the MCP3550-50 or MCP3550-60 devices will
have greater than 120 dB rejection (at either 50 or
60 Hz) by the digital filtering, even when jitter is
present.
The internal oscillator is held in the reset condition
when the part is in Shutdown mode to ensure very low
power consumption (< 1 A in Shutdown mode). The
internal oscillator is independent of all serial digital
interface edges (i.e., state machine processing the
digital SPI interface is asynchronous with respect to the
internal clock edges).
-120
-100
-80
-60
-40
-20
0
50
100
150
200
Frequency (Hz)
A
tt
en
u
at
ion
(
d
B
)
-120
-100
-80
-60
-40
-20
0
60
120
180
240
Frequency (Hz)
Att
en
u
at
io
n
(
d
B
)
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
1020 3040506070 8090 100 110
Frequency (Hz)
A
tt
enu
at
io
n
(
d
B
)
-140
-120
-100
-80
-60
-40
-20
0
28160 56320 84480 112640 140800 168960 197120 225280 253440
Frequency (Hz)
No
rm
a
l
Mo
d
e
Re
je
ct
io
n
(
d
B)
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