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| 型號： | MCP3421A0T-E/OT |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 28/30頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 18BIT 3.75SPS 1CH SOT23-6 |
| 標(biāo)準包裝： | 1 |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 3.75 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-6 |
| 包裝： | 標(biāo)準包裝 |
| 輸入數(shù)目和類型： | 2 個單端，雙極；1 個差分，單極 |
| 配用： | MCP3421EV-ND - BOARD EVAL FOR MCP3421 SOT23-6 |
| 其它名稱： | MCP3421A0T-E/OTDKR |
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2006 Microchip Technology Inc.
DS22003B-page 7
MCP3421
4.0
DESCRIPTION OF DEVICE
OPERATION
4.1
General Overview
The MCP3421 is a low-power, 18-Bit Delta-Sigma A/D
converter with an I2C serial interface. The device
contains an on-board voltage reference (2.048V),
programmable gain amplifier (PGA), and internal
oscillator. The user can select 12, 14, 16, or 18 bit
conversion by setting the configuration register bits.
The device can be operated in Continuous Conversion
or One-Shot Conversion mode. In the Continuous Con-
version mode, the device converts the inputs
continuously. While in the One-Shot Conversion mode,
the device converts the input one time and stays in the
low-power standby mode until it receives another
command for a new conversion. During the standby
mode, the device consumes less than 0.1 A typical.
4.2
Power-On-Reset (POR)
The device contains an internal Power-On-Reset
(POR) circuit that monitors power supply voltage (VDD)
during operation. This circuit ensures correct device
start-up at system power-up and power-down events.
The POR has built-in hysteresis and a timer to give a
high degree of immunity to potential ripples and noises
on the power supply. A 0.1 F decoupling capacitor
should be mounted as close as possible to the VDD pin
for additional transient immunity.
The threshold voltage is set at 2.2V with a tolerance of
approximately ±5%. If the supply voltage falls below
this threshold, the device will be held in a reset
condition. The typical hysteresis value is approximately
200 mV.
The POR circuit is shut-down during the low-power
standby mode. Once a power-up event has occurred,
the device requires additional delay time (approxi-
mately 300 s) before a conversion can take place.
During this time, all internal analog circuitries are
settled before the first conversion occurs. Figure 4-1
illustrates the conditions for power-up and power-down
events under typical start-up conditions.
When the device powers up, it automatically resets
and sets the configuration bits to default settings. The
default configuration bit conditions are a PGA gain of
1 V/V and a conversion speed of 240 SPS in
Continuous Conversion mode. When the device
receives an I2C General Call Reset command, it
performs an internal reset similar to a Power-On-Reset
event.
FIGURE 4-1:
POR Operation.
4.3
Internal Voltage Reference
The device contains an on-board 2.048V voltage
reference. This reference voltage is for internal use
only and not directly measurable. The specifications of
the reference voltage are part of the device’s gain and
drift specifications. Therefore, there is no separate
specification for the on-board reference.
4.4
Analog Input Channel
The differential analog input channel has a switched
capacitor structure. The internal sampling capacitor
(3.2 pF) is charged and discharged to process a
conversion. The charging and discharging of the input
sampling capacitor creates dynamic input currents at
the VIN+ and VIN- input pins, which is inversely
proportional to the internal sampling capacitor and
internal frequency. The current is also a function of the
differential input voltages. Care must be taken in setting
the common-mode voltage and input voltage ranges so
that the input limits do not exceed the ranges specified
4.5
Digital Output Code
The digital output code produced by the MCP3421 is a
function of PGA gain, input signal, and internal
reference voltage. In a fixed setting, the digital output
code is proportional to the voltage difference between
the two analog inputs.
The output data format is a binary two’s complement.
With this code scheme, the MSB can be considered a
sign indicator. When the MSB is a logic ‘0’, it indicates
a positive value. When the MSB is a logic ‘1’, it
indicates a negative value. The following is an example
of the output code:
(a) for a negative full-scale input voltage: 100...000
(b) for a zero differential input voltage: 000...000
(c) for a positive full-scale input voltage: 011...111.
The MSB is always transmitted first through the serial
port. The number of data bits for each conversion is 18,
16, 14, or 12 bits depending on the conversion mode
selection.
VDD
2.2V
2.0V
300 S
Reset Start-up
Normal Operation
Reset
Time
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