參數(shù)資料
型號： MCP3021A7T-E/OT
廠商： Microchip Technology
文件頁數(shù)： 8/26頁
文件大?。?/td> 0K
描述： ADC 10BIT I2C INTERFACE SOT23-5
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 10
采樣率（每秒）： 22.3k
數(shù)據(jù)接口： I²C，串行
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： SC-74A，SOT-753
供應(yīng)商設(shè)備封裝： SOT-23-5
包裝： 標(biāo)準(zhǔn)包裝
輸入數(shù)目和類型： 1 個(gè)單端，單極
其它名稱： MCP3021A7T-E/OTDKR
MCP3021
DS21805A-page 16
2003 Microchip Technology Inc.
5.2
Device Addressing
The address byte is the first byte received following the
START condition from the master device. The first part
of the control byte consists of a 4-bit device code,
which is set to 1001 for the MCP3021. The device code
is followed by three address bits: A2, A1 and A0. The
default address bits are 101 (contact the Microchip fac-
tory for additional address bit options).The address bits
allow up to eight MCP3021 devices on the same bus
and are used to determine which device is accessed.
The eighth bit of the slave address determines if the
master device wants to read conversion data or write to
the MCP3021. When set to a ‘1’, a read operation is
selected. When set to a ‘0’, a write operation is
selected. There are no writable registers on the
MCP3021, therefore, this bit must be set to a ’1’ to
initiate a conversion.
The MCP3021 is a slave device that is compatible with
the 2-wire I2C serial interface protocol. A hardware
connection diagram is shown in Figure 6-2. Communi-
cation is initiated by the microcontroller (master
device), which sends a START bit followed by the
address byte.
On completion of the conversion(s) performed by the
MCP3021, the microcontroller must send a STOP bit to
stop the communication.
The last bit in the device address byte is the R/W bit.
When this bit is a logic ‘1’, a conversion will be exe-
cuted. Setting this bit to logic ‘0’ will also result in an
“acknowledge” (ACK) from the MCP3021, with the
device then releasing the bus. This can be used for
device polling (refer to Section 6.3, “Device Polling”).
FIGURE 5-2:
Device Addressing.
5.3
Executing a Conversion
This section will describe the details of communicating
with the MCP3021 device. Initiating the sample and
hold acquisition, reading the conversion data and
executing multiple conversions will be discussed.
5.3.1
INITIATING THE SAMPLE AND
HOLD
The acquisition and conversion of the input signal
begins with the falling edge of the R/W bit of the
address byte. At this point, the internal clock initiates
the sample, hold and conversion cycle, all of which are
internal to the ADC.
FIGURE 5-3:
Initiating the Conversion,
Address Byte.
FIGURE 5-4:
Initiating the Conversion,
Continuous Conversions.
START
READ/WRITE
SLAVE ADDRESS
R/W
A
1
0
1
0
1
Address Bits1
1 Contact Microchip for additional address bits.
Device Code
1234
56
7
8
9
SCL
SDA
1
0
1 A2 A1 A0 R/W
AC
K
Start
Bit
Address Byte
Address bits
Device bits
tACQ + tCONV is
initiated here
SCL
SDA
D1 D0 X
AC
K
Lower Data Byte (n)
tACQ + tCONV is
initiated here
D4 D3 D2
X
D5
AC
K
D6
17 18 19 20 21 22 23 24 25 26
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