參數(shù)資料
型號(hào): MCM69R820C
廠商: Motorola, Inc.
英文描述: 4M-bit Synchronous Late Write Fast SRAM(4M位同步遲寫、快速靜態(tài)RAM)
中文描述: 4分位同步后寫入快速靜態(tài)存儲(chǔ)器(4分位同步遲寫,快速靜態(tài)內(nèi)存)
文件頁(yè)數(shù): 6/20頁(yè)
文件大?。?/td> 301K
代理商: MCM69R820C
MCM69R738C
MCM69R820C
6
MOTOROLA FAST SRAM
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VDD = 3.3 V
±
5%, 0
°
C
TA
70
°
C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
(See Notes 1 through 4)
Parameter
Symbol
Min
Max
–4
Max
–4.4
Max
–5
Max
–6
Max
Unit
Notes
Core Power Supply Voltage
VDD
VDDQ
IDD1
3.15
3.6
V
Output Driver Supply Voltage
2.3
2.8
V
AC Supply Current (Device Selected,
All Outputs Open, Freq = Max,
VDD = Max, VDDQ = Max).
Includes Supply Currents for VDD.
Quiescent Active Power Supply Current
(Device Selected, All Outputs Open,
Freq = 0, VDD = Max, VDDQ = Max).
Includes Supply Currents for VDD.
Active Standby Power Supply Current
(Device Deselected, Freq = Max,
VDD = Max, VDDQ = Max)
795
775
750
750
mA
5
IDD2
540
540
540
540
mA
6
ISB1
400
400
400
400
mA
7
CMOS Standby Supply Current
(Device Deselected, Freq = 0,
VDD = Max, VDDQ = Max, All Inputs
Static at CMOS Levels)
ISB2
390
390
390
390
mA
6, 7
Sleep Mode Current (ZZ = VIH,
Freq = Max, VDD = Max, VDDQ = Max)
NOTES:
1. All data sheet parameters specified to full range of VDD unless otherwise noted. All voltages are referenced to voltage applied to VSS
bumps.
2. Supply voltage applied to VDD connections.
3. Supply voltage applied to VDDQ connections.
4. All power supply currents measured with outputs open or deselected.
5. 50% read and 50% write; all addresses switching.
6. CMOS levels for I/Os are VIC
VSS + 0.2 V or
VDDQ – 0.2 V. CMOS levels for other inputs are Vin
VSS + 0.2 V or
VDD – 0.2 V.
7. Device deselected as defined by the Clock Truth Table.
IZZ
100
100
100
100
mA
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